IBM AT 5170 Technical Reference page 435

8088 microprocessor does interrupt on the INT
instruction.
• The divide error exception (interrupt 0):
80286 microprocessor pushes the eS:IP of the
instruction, causing the exception.
8088 microprocessor pushes the eS:IP following the
instruction, causing the exception.
• Shift counts are masked to five bits. Shift counts greater
than 31 are treated mod 32. For example, a shift count of
36, shifts the operand four places.
The following describes anomalies which may occur in systems
which contain 80286 processors with 1983 and 1984 date codes
(S40172, S54036, S40093, S54012).
In protected mode, the contents of the ex register may be
unexpectedly altered under the following conditions:
Note: The value in parenthesis indicates the type of error code
pushed onto the exception handler's stack.
Exception #NPO
=
Exception #11
=
Not-present Fault
Exception #SSO
=
Exception #12
=
Stack Fault
Exception #GPO
=
Exception #13
=
General Protection Fault
• Exception #GP(O) from attempted access to data segment or
extra segment when the corresponding segment register holds
a null selector.
• Exception #GP(O) from attempted data read from code
segment when code segment has the "execute only"
attribute.
• Exception #GP(O) from attempted write to code segment
(code segments are not writable in protected mode), or to
r""\
data segment of extra segment if the data or extra segment
has the read only attribute.
Compatibility 9-9