IBM AT 5170 Technical Reference page 55

Mask On Write to I/O address hex 070, with data bit 7
equal to a logic O.
Mask Off
Write to
1/
0 address hex 070, with data bit 7
equal to a logic 1.
Note: At the end of POST, the system sets the NMI mask
on (NMI enabled).
The following is a description of the Math Coprocessor controls.
OFO An 8-bit Out command to port FO will clear the latched
Math Coprocessor' -busy' signal. The' -busy' signal will
be latched if the coprocessor asserts its '-error' signal
while it is busy. The data output should be zero.
OFI An 8-bit Out command to port Fl will reset the Math
Coprocessor. The data output should be zero.
I/O address hex 080 is used as a diagnostic-checkpoint port or
register. This port corresponds to a read/write register in the
DMA page register (74LS612).
The '-I/O channel check' signal (-I/O CH CK) is used to report
non-correctable errors on RAM adapters on the I/O channel.
This check will create an NMI if the NMI is enabled. At
power-on time, the NMI is masked off and -I/O CH CK is
disabled. Follow these steps when enabling -I/O CH CK and the
NMI.
1. Write data in all I/O RAM-adapter memory locations; this
will establish good parity at all locations.
2. Enable -I/O CH CK.
3. Enable the NMI.
Note: All three of these functions are performed by POST.
~
When a check occurs, an interrupt (NMI) will result. Read the
status bits to determine the source of the NMI (see the figure,
"I/O Address Map", on page 1-37). To determine the location
of the failing adapter, write to any memory location within a given
System Board 1-39