IBM AT 5170 Technical Reference page 253

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IBM Personal Computer MACRO Assembler Version 2.00 I-I
POST AND BIOS UTILITY ROUTINES 06-10-65
PAGE 118,121
TITLE TES14 ---- 06/10/85 POST AND BIOS UTILITY ROUTINES
.286C
.LIST
CODE SEGMENT 8YTE PUBL IC
TEST.... ---- 06/10/85
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58
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59 0006 FA
60 0007 E6 70
61 0009 90
62 OOOA E4 11
63 OOOC 50
64 0000 BO lA
65 OOOF DO 06
66 0011 E6 70
61 0013 58
68 0014 OE
69 0015 E6 0019 R
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102 0022 E6 10
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105 0026 BO I A
106 002A DO 08
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112
113
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EXTRN
EXTRN
EXTRN
EXTRN
ASSUlIIE
POST4:
; --- CMOS READ
INPUT: (AL)
=
OUTPUT: (ALI
;
--------------
­
CMOS_READ
PUSHF
ROL
STC
RCR
CLI
OUT
NDP
IN
PUSH
"DV
RCR
OUT
POP
PUSH
CALL
RET
CMOS_READ
CMOS_POPF
IRET
CMOS_POPF
- - CMOS WR [TE
INPUT: (AL)
=
(AHI
=
OUTPUT:
-
:
­
CMOS WRITE
- PUSHF
PUSH
ROL
STC
RCR
CLI
OUT
MOV
OUT
MOV
RCR
OUT
POP
PUSH
CALL
RET
BEEP
BLINK INT
CMOS READ
CMOS-WR ITE
CONFTG BAD
011 ­
DDS
DUMMY RETURN I
ERR BEEP ­
E
MSG
INT 267
KBD-RESET
POST4
PROT PRT HEX
PROC-SHUTDOWN
PRT HEX
PRT-SEG
P MSG
RE DIRECT
ROM CHECK
ROM-CHECKSUM
SET-TOO
WAITF
XPC_BYTE
EI63:NEAR
OBF 42:NEAR
ROM-ERR: NEAR
XMIT_80 .... 2:NEAR
CS: CODE, OS: DATA
READ BYTE FROM CMOS SYSTEM CLOCK CONFIGURATION TABLE
CMOS TABLE ADDRESS TO BE READ
BIT 7
=
0 FOR NM I ENABLED AND I FOR NM I 0 I SABLEO ON EX IT
BITS 6-0
=
ADDRESS OF TABLE LOCATION TO READ
VALUE AT LOCATION (ALI MOVED INTO {AU. IF BIT 7 OF (ALI WAS
ON THEN NM I LEFT 0 I SABLED. OUR I NG THE CMOS READ BOTH NM I AND
NORMAL INTERRUPTS ARE DISABLED TO PROTECT CMOS DATA INTEGR ITY •
THE CMOS ADDRESS REGISTER IS POINTED TO A DEFAULT VALUE AND
THE INTERRUPT FLAG RESTORED TO THE ENTRY STATE ON RETURN.
ONLY THE (ALI REGISTER AND THE NMI STATE IS CHANGEO.
PROC
NEAR
AL, I
AL,I
CMOS _PORT, AL
AL,CMOS_DATA
AX
AL,CMOS_REG_D s 2
AL, I
CMOS_PORT, AL
AX
CS
CMOS_POPF
ENDP
PROC NEAR
ENDP
READ LOCATION (ALI INTO (ALI
SAVE INTERRUPT ENABLE STATUS AND FLAGS
MOVE NMI BIT TO LOW POSITION
FORCE NMI BIT ON IN CARRY FLAG
HIGH BIT ON TO DISABLE NMI - OLD IN CY
o
I SABLE INTERRUPTS
ADDRESS LOCATION AND DISABLE NM[
I/O DELAY
READ THE REQUESTEO CMOS LOCAT I ON
SAVE (AHI REGISTER VALUE AND CMOS BYTE
GET ADDRESS OF DEFAULT LOCATION
PUT ORIGINAL NMI MASK. BIT INTO ADDRESS
SET OEFAULT TO READ ONL.Y REGISTER
RESTORE (AH ~ AND (AL 1:1: CMOS BYTE
-PLACE CODE SEGMENT IN STACK AND
sHANDLE POPF FOR B- LEVEL 602a6
RETURN WITH FLAGS RESTORED
POPF FOR LEVEL B- PARTS
RETURN FAR AND RESTORE FLAGS
------- ------------- - - - --- -------,--------------------- --------- ­
WRITE BYTE TO CMOS SYSTEM CLOCK CONFIGURATION TABLE
CMOS TABLE ADDRESS TO BE WRITTEN TO
BIT 7
=
0 FOR Nidi ENABLED AND I FOR NMI DISABLED ON EXIT
81TS 6-0
=
ADDRESS OF TABLE LOCATION TO WRITE
NEW VALUE TO BE PLACED IN THE ADDRESSED TABLE LOCATION
VALUE IN (AH) PLACED IN LOCATION (ALI WITH NMI LEFT DISABLED
IF BIT 7 OF (ALI IS ON. DURING THE CMOS UPDATE BOTH NMI AND
NORMAL INTERRUPTS ARE 01 SABLED TO PROTECT CMOS DATA INTEGR ITY •
THE CMOS ADDRESS REGISTER IS POINTED TO A DEFAULT VALUE AND
THE INTERRUPT FLAG RESTORED TO THE ENTRY STATE ON RETURN •
ONLY THE CMOS LOCATION AND THE NMI STATE IS CHANGED. :
WRITE {AHI TO LOCATION (ALl
SAVE INTERRUPT ENABLE STATUS AND FLAGS
SAVE WORK REGISTER VALUES
MOVE NMI BIT TO LOW POSITION
FORCE NMi BIT ON IN CARRY FLAG
HIGH BIT ON TO 01 SABLE NMI - OLD IN CY
o I SABLE INTERRUPTS
ADDRESS LOCATION AND DISABLE NMJ
GET THE DATA BYTE TO WR I TE
PLACE IN REQUESTED CMOS LOCATION
GET ADDRESS OF DEFAULT LOCATION
PUT ORIGINAL NMI MASK BIT INTO ADDRESS
SET OEF AUL T TO READ ONLY REG I STER
RESTORE WORK REG I STERS
-PLACE CODE SEGMENT IN STACK AND
-HANOLE POPF FOR 8- LEVEL 80286
PROC NEAR
AX
AL,I
AL,l
CMOS PORT, AL
AL,AH
CMOS DATA,AL
AL, CMOS REG 0-2
AL,I - ­
CMOS PORT, AL
AX ­
CS
CMOS_POPF
ENDP
TEST4
5-81