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Chapter 4
Signal Connections
+
Floating
V
Signal
S
Source
-
Bias
Current
Return
Paths
Bias
Resistor
(see text)
I/O Connector
Common-Mode Signal Rejection Considerations
PCI-6110E/6111E User Manual
ACH0+
100pf
ACH0-
ACH0GND
ACH0 Connections Shown
Figure 4-4. Differential Input Connections for Nonreferenced Signals
Figure 4-4 shows a bias resistor connected between ACH0 – and the
floating signal source ground. If you do not use the resistor and the
source is truly floating, the source is not likely to remain within the
common-mode signal range of the PGIA, and the PGIA will saturate,
causing erroneous readings. You must reference the source to the
respective channel ground.
Figure 4-3 shows connections for signal sources that are already
referenced to some ground point with respect to the 611X E board. In
this case, the PGIA can reject any voltage caused by ground potential
differences between the signal source and the board. In addition, with
differential input connections, the PGIA can reject common-mode noise
pickup in the leads connecting the signal sources to the board. The
PGIA can reject common-mode signals as long as V +
signals) are both within ±11 V of the channel ground, for gain
gain <1, the input signals, for ACHO +, can be within ±42 V of the
channel ground.
1M
10nf
4-12
Instrumentation
Amplifier
+
PGIA
+
Measured
-
V
m
Voltage
-
and V -
in
© National Instruments Corporation
(input
in
1. For
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