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National Instruments PCI-6528 Manual

National Instruments PCI-6528 Manual

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  • Page 1 PCI-6528...
  • Page 2 Static DIO Register-Level Programmer Manual for NI 6509, 651 x , 6520, 6521, and 6528 Devices Static DIO Register-Level Programmer Manual November 2005 371580A-01...
  • Page 3 For further support information, refer to the Technical Support Resources appendix. To comment on National Instruments documentation, refer to the National Instruments Web site at ni.com/info and enter the info code feedback. © 2005 National Instruments Corporation. All rights reserved.
  • Page 4 The reader should consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it.

  • Page 5: Table Of Contents

    RTSI_En(N ) ....................2-12 Non-recurring Registers....................2-13 ID Register.......................2-13 Clear Register ....................2-14 Change Status Register..................2-15 Master Interrupt Control Register ..............2-16 Revision Register.....................2-17 Filter Interval 32-Bit Register .................2-18 Automatic Clock Selection Register (PXI-6528 Only) ........2-19 © National Instruments Corporation Static DIO Register-Level Programmer Manual...
  • Page 6 Contents Watchdog Timer Software Timeout Enable ........... 2-20 Watchdog Timer Expire Status ............... 2-21 Watchdog Timer Timeout Interval ..............2-22 RTSI Configuration Registers ..................2-23 RTSI Input Route .................... 2-23 RTSI Pulse when Edge Detected ..............2-24 RTSI Pulse when Watchdog Timer Expires ........... 2-25 RTSI Trigger for Watchdog Timer ..............

  • Page 7: About This Manual

    OS is also unsupported in NI-DAQmx Base, you would then need to program your device using the Static DIO Register-Level Programmer Manual for NI 6509, 651x, 6520, 6521, and 6528 Devices. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 8: How To Use The Manual Set

    About This Manual How To Use the Manual Set The Static DIO Register-Level Programmer Manual for NI 6509, 651x, 6520, 6521, and 6528 Devices is one piece of the documentation set for your data acquisition system. You could have any of several types of manuals, depending on the hardware and software in your system.
  • Page 9 Text in this font denotes sections of code, programming examples, and monospace syntax examples. This font is also used for the proper names of programs, subprograms, subroutines, device names, functions, operations, variables, filenames and extensions, and code excerpts. © National Instruments Corporation Static DIO Register-Level Programmer Manual...
  • Page 10 NI 6528 is ideal for 60 V isolation and switching in both industrial and laboratory environments. For more information regarding the functions, installation, connections, and safe use of the NI 6509/651x/6520/6521/6528 devices, refer to the Digital IO Help. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 11: Using Your Ni 6509/651X/6520/6521/6528

    PCI Interface The NI 6509/651x/6520/6521/6528 use the PCI MITE Application-Specific Integrated Circuit (ASIC) to communicate with the PCI or PXI bus. National Instruments designed this ASIC specifically for data acquisition. Before register-level programming the NI 6509/651x/6520/6521/6528 device, you must initialize the PCI interface as described in Chapter 3, Programming.
  • Page 12 — — — — — — PXI-6521 — — — — — — — — — — PCI-6528 — — — — — — PXI-6528 — — — — — — © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 13: Register Map And Descriptions

    The following sections show the register map for the NI 6509/651x/6520/6521/6528 devices with the registers sorted by function. All NI 6509/651x/6520/6521/6528 devices have the same addresses for common registers. © National Instruments Corporation Static DIO Register-Level Programmer Manual...
  • Page 14 Chapter 2 Register Map and Descriptions Table 2-1. NI 6509/651 x /6520/6521/6528 Register Address Map—Recurring Port Registers Register Name Short Name Offset (Hex) Type Size IO Port Data IOPort(N)Data 0x40 + 0xN0 Read-write 8-bit IO Select IOSelect(N) 0x41 + 0xN0 Read-write 8-bit Rising Edge Sensitivity...
  • Page 15 The size of the register indicates how many bits you should read or write at a time. Reading a different size—for example, reading a 32-bit register with four 8-bit reads—may create invalid data. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 16: Io Port Data

    Chapter 2 Register Map and Descriptions IO Port Data IOPort( N )Data This register is used to read digital data from or write data to port N, where N is the port number in hexidecimal. Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port, you must add an additional offset equal to 0x10 time the port number in hex.

  • Page 17: Io Select Registers

    Write only zeros to these bits. I(1) / O(0) Write a 0 for input or a 1 for output. Note It is not necessary to set this register if your device only supports fixed direction ports. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 18: Rising Edge Sensitivity Configuration Registers

    Chapter 2 Register Map and Descriptions Rising Edge Sensitivity Configuration Registers RiseEdgeEnable( N ) This register enables monitoring of input lines of port N for rising edges, where N is the port number in hexidecimal. Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port, you must add an additional offset equal to 0x10 time the port number in hex.

  • Page 19: Falling Edge Sensitivity Configuration Registers

    Type: Read-write Size: 8-bit Bit Map: FEE(7) FEE(6) FEE(5) FEE(4) FEE(3) FEE(2) FEE(1) FEE(0) Name Description 7–0 FEE(<7..0>) Write a 1 to a bit to enable monitoring for the corresponding line. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 20: Filter Enable Registers

    Chapter 2 Register Map and Descriptions Filter Enable Registers FilterEnable( N ) This register enables filtering of input lines of port N, where N is the port number in hexidecimal. In FilterEnable(N) registers, all lines of all ports share the same interval. Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device.

  • Page 21: Watchdog Timers High-Impedance Registers

    Write a 0 to this register to make the port output high/low values on a per line basis. The watchdog timer must be enabled for either option to activate. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 22: Watchdog Timer Enable Registers

    Chapter 2 Register Map and Descriptions Watchdog Timer Enable Registers WatchdogEnable( N ) This register enables port N to go to configured expiration states when the watchdog timer (WDT) expires, where N is the port number in hexidecimal. WatchdogEnable(N) is only valid for fixed output or bidirectional ports.

  • Page 23: Watchdog Timer High Or Low Registers

    Name Description 7–0 wdtHL(<7..0>) WatchdogHighImp(N) must be 0 to enable this option. Write a 1 to output high on line i. Write a 0 to output low on line i. © National Instruments Corporation 2-11 Static DIO Register-Level Programmer Manual...

  • Page 24: Rtsi Enable Registers

    Chapter 2 Register Map and Descriptions RTSI Enable Registers RTSI_En( N ) This register enables RTSI for port N, where N is the port number in hexidecimal. Note Ports can range from 0 to 11 (0x0 to 0xB), depending on your device. For each port, you must add an additional offset equal to 0x10 time the port number in hex.

  • Page 25: Non-Recurring Registers

    ID(3) ID(2) ID(1) ID(0) Name Description 7–0 ID(<7..0>) Contains the ID of your device in hexidecimal. Usually corresponds to the last two digits of the model name of your device. © National Instruments Corporation 2-13 Static DIO Register-Level Programmer Manual...

  • Page 26: Clear Register

    Chapter 2 Register Map and Descriptions Clear Register Write to individual bit of this register to clear certain functionality in the board. Address Offset: 0x01 Type: Write strobe Size: 8-bit Bit Map: Reserved ClrWDT+ RstWDT ClrWDTExp ClrEdge ClrOvrFlow Reserved Reserved Name Description Reserved...

  • Page 27: Change Status Register

    Edge Status Indicates an edge has been detected. If the EdgeInt bit is set in the Master Interrupt Control Register, Edge Status set indicates an interrupt is currently being asserted. © National Instruments Corporation 2-15 Static DIO Register-Level Programmer Manual...

  • Page 28: Master Interrupt Control Register

    Chapter 2 Register Map and Descriptions Master Interrupt Control Register The Master Interrupt Control Register enables change detection interrupts. Address Offset: 0x03 Type: Read-write Size: 8-bit Bit Map: Reserved Reserved Falling Rising Master OverFlow Edge Expiration Edge Edge Interrupt Enable Interrupt IntEnable IntEnable...

  • Page 29: Revision Register

    Rev(19) Rev(18) Rev(17) Rev(16) Rev(15) Rev(14) Rev(13) Rev(12) Rev(11) Rev(10) Rev(9) Rev(8) Rev(7) Rev(6) Rev(5) Rev(4) Rev(3) Rev(2) Rev(1) Rev(0) Name Description 31–0 Rev(<31..0>) Contains the revision of your device. © National Instruments Corporation 2-17 Static DIO Register-Level Programmer Manual...

  • Page 30: Filter Interval 32-Bit Register

    Chapter 2 Register Map and Descriptions Filter Interval 32-Bit Register The filter interval register controls the filter interval for distinguishing between valid input pulses and glitches. There are twenty bits in the filter interval register. Address Offset: 0x08 Type: Read-write Size: 32-bit Bit Map:...

  • Page 31: Automatic Clock Selection Register (Pxi-6528 Only)

    Bit 0 has a default value of 0, which means automatic clock selection is enabled. Write a 1 to bit 0 to disable automatic clock selection and force use of the onboard oscillator. © National Instruments Corporation 2-19 Static DIO Register-Level Programmer Manual...

  • Page 32: Watchdog Timer Software Timeout Enable

    Chapter 2 Register Map and Descriptions Watchdog Timer Software Timeout Enable This register enables the device to go to specified expiration states when the watchdog timer expires. Address Offset: 0x15 Type: Read-write Size: 8-bit Bit Map: Reserved Reserved Reserved Reserved Reserved Reserved Reserved...

  • Page 33: Watchdog Timer Expire Status

    Reserved Reserved WDTExpStat Name Description 7–1 Reserved Disregard these bits. WDTExpStat A 0 indicates the device is operating normally. A 1 indicates the device has gone to the expiration state. © National Instruments Corporation 2-21 Static DIO Register-Level Programmer Manual...

  • Page 34: Watchdog Timer Timeout Interval

    Chapter 2 Register Map and Descriptions Watchdog Timer Timeout Interval This register specifies the amount of time to wait before going to the expiration state. It is expressed in terms of 100 ns. Address Offset: 0x18 Type: Read-write Size: 32-bit Bit Map: WDT_TI(31) WDT_TI(30) WDT_TI(29) WDT_TI(28) WDT_TI(27) WDT_TI(26) WDT_TI(25) WDT_TI(24) WDT_TI(23) WDT_TI(22)

  • Page 35: Rtsi Configuration Registers

    RTSI IR(8) corresponds to the PXI Star Trigger line on PXI devices. For PCI—The RTSI-enabled port is the first input-enabled port. ♦ For PXI—The RTSI-enabled ports are the first two input-enabled ports. ♦ © National Instruments Corporation 2-23 Static DIO Register-Level Programmer Manual...

  • Page 36: Rtsi Pulse When Edge Detected

    Chapter 2 Register Map and Descriptions RTSI Pulse when Edge Detected This register configures which RTSI lines to pulse for 200 ns when there is an edge detected on any of the lines configured for monitoring. Address Offset: 0x0E Type: Read-write Size: 16-bit...

  • Page 37: Rtsi Pulse When Watchdog Timer Expires

    RTSI register. Write a 1 to a bit to make that RTSI line pulse for 200 ns when the watchdog timer expires. RTSI PWE(8) corresponds to the PXI Star Trigger line on PXI devices. © National Instruments Corporation 2-25 Static DIO Register-Level Programmer Manual...

  • Page 38: Rtsi Trigger For Watchdog Timer

    Chapter 2 Register Map and Descriptions RTSI Trigger for Watchdog Timer Enables RTSI line to act as a hardware trigger for the watchdog timer. Address Offset: 0x12 Type: Read-write Size: 16-bit Bit Map: Reserved Reserved Reserved Reserved Reserved Reserved Reserved RTSI Trig(8) RTSI...

  • Page 39: Rtsi Edge Detection Configuration Register

    Write a 1 to this bit to use synchronous RTSI edge detection. For more information on RTSI industrial DIO feature registers, refer to the RTSI Trigger for section. Watchdog Timer © National Instruments Corporation 2-27 Static DIO Register-Level Programmer Manual...

  • Page 40: Programming

    Programming Your Device without the NI Measurement Hardware DDK If you chose not to use the NI Measurement Hardware DDK, you will need to detect your device and initialize the PCI bus and MITE interface. © National Instruments Corporation Static DIO Register-Level Programmer Manual...

  • Page 41: Initializing The Pci Bus

    Chapter 3 Programming Initializing the PCI Bus The PCI Bus is a high performance, 32-bit bus with multiplexed address and data lines. This system arbitrates and assigns resources through software, freeing you from manually setting switches and jumpers. The PCI Bus moves data for the NI 6509/651x/6520/6521/6528 devices. Configure the bus-related resources before you execute a register-level program.

  • Page 42: Example

    //Write the address to which you want to re-map the PCI MITE to PCI configuration space offset 0x10 (BAR0). Write(0xD0340,0x0000AEAE) //Write the value 0x0000AEAE to offset 0x340 from the new PCI MITE address. © National Instruments Corporation Static DIO Register-Level Programmer Manual...
  • Page 43 Chapter 3 Programming CWrite(0x14,0x000D1000) //Write the address to which you want to re-map the device (other than the PCI MITE) to PCI configuration space offset 0x14 (BAR1). //Create the window data value by masking the new device address:window data value = ((0xFFFFFF00 AND new device address) OR (0x00000080)).

  • Page 44: Technical Support Resources

    Technical Support Resources Visit the following sections of the National Instruments Web site at for technical support and professional services: ni.com • Support—Online technical support resources at ni.com/support include the following: – Self-Help Resources—For answers and solutions, visit the award-winning National Instruments Web site for software drivers...
  • Page 45 Appendix A Technical Support Resources Calibration Certificate—If your product supports calibration, • you can obtain the calibration certificate for your product at ni.com/ calibration If you searched and could not find the answers you need, contact ni.com your local office or NI corporate headquarters. Phone numbers for our worldwide offices are listed at the front of this manual.

  • Page 46: Glossary

    PCI Industrial Computer Manufacturer’s Group (PICMG) data acquisition—a system that uses the personal computer to collect, measure, and generate electrical signals digital input/output © National Instruments Corporation Static DIO Register-Level Programmer Manual...
  • Page 47 Glossary isolation signal conditioning to break ground loops and reject high common-mode voltages to protect equipment and users and to ensure accurate measurements least significant bit most significant bit optical isolation the technique of using an optocoupler to transfer data without electrical continuity, to eliminate high-potential differences and transients optocoupler a device that transfers electrical signals by utilizing light waves to provide...

  • Page 48: Index

    Falling Edge IntEnable bits, 2-16 drivers (NI resources), A-1 Master Interrupt Enable bits, 2-16 OverFlow Enable bits, 2-16 Rising Edge IntEnable bits, 2-16 WDT Exp IntEnable bits, 2-16 examples (NI resources), A-1 © National Instruments Corporation Static DIO Register-Level Programmer Manual...
  • Page 49 Index National Instruments support and recurring port registers services, A-1 Falling Edge Sensitivity Configuration NI Measurement Hardware Driver registers, 2-7 Development Kit (DDK), 3-1 Filter Enable registers, 2-8 programming your device without, 3-1 IO Port Data, 2-4 NI support and services, A-1...
  • Page 50 Watchdog Timer High or Low registers, 2-11 WDTSwToEn bits, Watchdog Timer Software software (NI resources), A-1 Timeout Enable register, 2-20 technical support resources, A-1 training and certification (NI resources), A-1 troubleshooting (NI resources), A-1 © National Instruments Corporation Static DIO Register-Level Programmer Manual...

This manual is also suitable for:

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