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PCI-934 Technical Reference Manual
To select one base address, use the BIOS setup program – Chipset Feature Setup.
Register #1 (190h, 290h or 390h)
Bit Access
Ref.
0
R/W
ENWD
1
R/W
CWD
2
R/W
ST1
3
R/W*
RS232
4
R/W*
RS485
5
R/W*
T
A
OUT_
CK
6
R/W*
ENSMI#
7
R/W*
DIS_LAN#
* Do not change this bit since it is used by the BIOS
Register #2 (191h, 291h or 391h)
Bit Access
Ref.
0
R
PFO#
1
R
TOUT_ACK
2
R
x
3
R
x
4
R
x
5
R
WDO
6
R
WDO1#
7
R
PBRES
Register #3 (192h, 292h or 392h)
Bit Access
Ref.
0
R/W
CLRHIS#
EN_MPEG#
1
R/W*
2
R/W*
LOCK
3
R
4
R/W
VP_OI_1
5
R/W
VP_OI_2
EN_IRQ_MPEG
6
R/W*
7
R/W
EN_CAM#
* Do not change this bit since it is used by the BIOS
Enable/Disable External Watchdog Circuit (1: En / 0: Dis)
Watchdog Control. To be toggled to activate the external WD circuit when
ENWD bit is high.
Enable/Disable RTS Output for RS-485 (Serial Port 2)
Enable/Disable RS-232 Operation (Serial Port 2)
Enable/Disable RS-485 Operation (Serial Port 2)
Acknowledge Temperature Alarm
Enable External SMI
Enable/Disable Ethernet Controller (1: En / 0: Dis)
Reads the External Power Fail Flag
Status of Temperature Controller Alarm (1: temp. alarm / 0: normal)
Reserved
Reserved
Reserved
When high, indicates that the last system reset was caused by a watchdog
time out
When low, indicates that the first level watchdog timed out
When high, indicates that the last system reset was caused by a push
button reset switch
Clears WDO and PBRES status bits (0: clear ; 1: normal)
Enable M-PEG decoder (1: Disable ; 0: Enable)
Reserved
Reserved
General purpose output for V-Port control
General purpose input for V-Port control
Reserved
Controls V-Port buffer (0: external; 1: MPEG)
6-10
Function
Function
Function
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