Checkpoints; Checkpoint Ranges; Standard Checkpoints - QUANTA STRATOS S210 Series S210-X2A2J Technical Manual

Optimized 2-socket, 4-gpgpu 2u server
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BIOS
the onboard controllers. The legacy PXE ROM is required to
boot a non-EFI operating system over the network.

Checkpoints

A checkpoint is either a byte or word value output to Debug
port. The BIOS outputs checkpoints throughout bootblock and
Power-On Self Test (POST) to indicate the task the system is
currently executing. Checkpoints are very useful in aiding soft-
ware developers or technicians in debugging problems that
occur during the pre-boot process.

Checkpoint Ranges

Checkpoint Ranges
S
C
TATUS
ODE
R
ANGE
0x01 – 0x0B
SEC execution
0x0C – 0x0F
SEC errors
0x10 – 0x2F
PEI execution up to and including memory detection
0x30 – 0x4F
PEI execution after memory detection
0x50 – 0x5F
PEI errors
0x60 – 0x8F
DXE execution up to BDS
0x90 – 0xCF
BDS execution
D
ESCRIPTION
Checkpoint Ranges (Continued)
S
C
TATUS
ODE
R
ANGE
0xD0 – 0xDF
DXE errors
0xE0 – 0xE8
S3 Resume (PEI)
0xE9 – 0xEF
S3 Resume errors (PEI)
0xF0 – 0xF8
Recovery (PEI)
0xF9 – 0xFF
Recovery errors (PEI)

Standard Checkpoints

SEC Phase
SEC Phase
S
C
TATUS
ODE
0x00
Not used
Progress Codes
0x01
Power on. Reset type detection (soft/hard).
0x02
AP initialization before microcode loading
0x03
North Bridge initialization before microcode loading
0x04
South Bridge initialization before microcode loading
0x05
OEM initialization before microcode loading
0x06
Microcode loading
3-53
C
HECKPOINTS
D
ESCRIPTION
D
ESCRIPTION

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