Sony TRINITRON PVM-14L5 Service Manual page 64

Color video monitor
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9. ABL circuit
The ABL circuit consists of Q2006 for PIC ABL and Q2005 for BRT ABL. Respective emitters receive
the ABL voltage from deflection block and bases receive the DC voltages that are generated by voltage-
dividing. Respective collectors are connected to pin-46 (PIC control) and pin-7 (BRT control of IC2001.
When these transistors turn on, the respective control voltages decrease so that the ABL operation is
implemented. At the same time, Q2007 switches the peak voltage depending on the picture sizes of either
16 : 9 or 4 : 3.
10 Auto chroma phase control
The RGB signals that are output from IC2001 are read by the main microprocessor so that the PR LEVEL
(IC1301) and the PB LEVEL (IC1401) are automatically controlled until the R and B sampled levels
match.
11. Aperture correction circuit
The APERTURE signal compensates the response at 5 MHz with DL251 and DL252 in the modes of
480/60I and 575/50I. It compensates the response at 16 MHz with DL253 and DL254 in the modes of all
other frequencies. DL404 and DL405 are the delay lines that compensate the Y signal delay time. DL351
and DL352 are the delay lines that compensate the PB signal delay time. DL451 and DL452 are the delay
lines that compensate the PR signal delay time. Amount of delay compensation can be variably adjusted
in the range of 2 to 6 dB by the APERTURE amplifier when APERTURE is ON.
12. Sync separator circuit
IC1001 (2/3), IC1001 (3/3), Q1002 and Q1003 switch the signal signals depending on the mode of 480/
60I and 575/50I, or other modes. Sync signal is separated by the sync agc circuit of Q1004 to Q1019.
IC1001 (1/3) selects either INT SYNC or EXT SYNC. IC1053, Q1053, Q1054, Q1056 and Q1058 extract
equalizing pulse. IC1056, IC1057, IC1058 and IC1059 are the horizontal sync separator circuit. Q1057,
Q1058, Q1060 and IC1055 are the vertical sync separator circuit. IC1054 is the selector switch because
the already separated horizontal sync and the vertical sync signals are supplied in the SDI signal mode
only.
13. System control
IC1101 (system control CPU) of the M board controls the entire system of this machine. Various setups
are saved in IC104 and IC108 (EEPROM).
14. Internal bus
For each of the deflection circuit and the signal circuits, power conversion is executed by Q110 and
2
2
Q111, and the control by the I
C bus applies. Operations of the I
C bus are controlled by the general-
purpose port of IC1101 (M board) that is again controlled by software.
15. Character generator and internal signal generator
IC106 is the generator IC for menu display and others. IC110 generates the 4 : 3 marker signal and other
various automatic adjustment signals. Output of these two ICs are mixed at IC53 and IC54.
16. Parallel remote
IC3770 of Q board reads status of the parallel remote connector and transfers the data to the CPU in the
IC1101 (M board).
17. Serial communication driver
IC3750 and IC3751 of the Q board are the RS-485 driver. IC1101 (M board) receives the serial remote
signal information and implements the required controls.
5-2
PVM-14L5/20L5/D14L5A/D20L5A

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