Fig. 315 Host Interface Control Circuit - Teac MT-20D-IO Maintenance Manual

HOST
DATA
BUS
DIR
ROY
XFR
ACK
/
UIS
23",31
HB~
\ / S
\
DRIVER
V
\
/
IRECEIVER
f\
/
HB7
I
\
I
CLKO
HBP
UI7
UI8
~
HBOEN(H} 16
HBOEN
DIR(H}18
DIR HDRQ
'"'
RDY(H} 20
DACK~
~
ROY
XFR(HI32
XFR
EOP
ACK(H}21
ACK WR
RD
Fig. 315 Host interface control circuit
- 325 -
38
-
7.2 MHz
15
HDRO(H}
12
HDACK(U
14
EOP(L)
40
10W(L)
41
10R(Ll