Phase-Locked Loop; Autocalibration - Stanford Research Systems SIM918 Operating And Service Manual

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2.5 Phase-Locked Loop

2.6 Autocalibration

via OFST 2, driving the input o set voltage back to a value deter-
mined by OFST 3. With autozero o , OFST 3 has no e ect and
OFST 2 changes the input o set directly.
The best value for OFST 2 is readjusted each time autozero is turned
from on to o . If the preamplifier is to be operated under condi-
tions that tolerate absolutely no clock transitions, the recommended
course of action is to turn autozero on, let the control loop drive the
output to zero and settle, and turn autozero o for the duration of
the experiment (Section 2.8).
The value for OFST 3 is reestablished by autocalibration (Section 2.6).
The switches in the autozero circuit receive a clock signal from an
internal phase-locked loop. If an external reference clock is available
at the rear-panel Ref Clock Sync connector, autozero is on, and the
connector is not selected for output, the PLL will attempt to lock to
the clock signal. The synchronization will be successful for external
clock frequencies between 0.90 Hz and 1.10 Hz.
In the internal reference clock mode, the PLL oscillator runs freely,
generating a 1.0 Hz square wave with rising edges at the beginning
of each autozero half-cycle. The voltage-controlled oscillator in the
loop operates at 240 Hz for 60 Hz power line frequency (FPLC), and
at 200 Hz for FPLC 50 Hz.
The PLL can be automatically inhibited, and the voltage-controlled
oscillator turned o , when the reference clock is External and au-
tozero is o . The behavior is set by the remote command APLL. With
APLL OFF, the oscillator turns o . In this mode, under external ref-
erence clock, the instrument will undergo the full capture and lock
transient after autozero is switched on. To avoid the 4 minute capture
delay, set APLL ON. The module restores the last known APLL mode
upon power-on.
When autozero is on, the PLL oscillator is always running, regardless
of the reference clock source. If the reference clock is internal and
autozero is o , the PLL oscillator is o . There is no capture delay
under internal clock.
To ensure the specified o set accuracy, the preamplifier must be self-
calibrated within the 24 hours preceding a measurement. A valid au-
tocalibration must take place at (23 5) C with the module warmed
up for at least 2 hours at (23 5) C. If the module is being used inside
Description of Operation
SIM918 Precision Current Preamplifier