EPOX EP-BX6 User Manual page 41

EP-BX6
5: 5 wait states
7: 7 wait states
16 Bit I/O Recovery Time: This function allows you to set the wait state that is
added to an 16 bit ISA instruction originated by the PCI bus. The default is 1.
NA: No wait state
3: 3 wait states
1: 1 wait states
Memory Hole at 15M-16M: You can reserve this memory area for the use of
ISA adaptor ROMs. The default is Disabled.
Enabled: This field enables the main memory (15~16MB) to remap to ISA
BUS.
Disabled: Normal Setting.
NOTE: If this feature is enabled you will not be able to cache this
memory segment.
Passive Release: This option allows access from the CPU to PCI bus to be
active during passive release. Otherwise, the arbiter only accepts another PCI
master access to local DRAM. The default is Enabled.
Enabled: Enabled.
Disabled: Disabled.
Delayed Transaction: This option allows the chipset to use its embedded 32-bit
posted write buffer to support delay transactions cycles. The default is Disabled.
Enabled: Select enabled to support PCI 2.1 specification.
Disabled: Disabled.
AGP Aperture Size: The amount of system memory that the AGP card is
allowed to share. The default is 64.
4: 4MB of systems memory accessable by the AGP card.
8: 8MB of systems memory accessable by the AGP card.
16: 16MB of systems memory accessable by the AGP card.
32: 32MB of systems memory accessable by the AGP card.
64: 64MB of systems memory accessable by the AGP card.
128: 128MB of systems memory accessable by the AGP card.
256: 256MB of systems memory accessable by the AGP card.
6: 6 wait states
4: 4 wait states
2: 2 wait states
BIOS
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