Lvds Interface (Sis302Lv - EUROCOM D400V Service Manual

Notebook computer
Hide thumbs Also See for D400V:
Table of Contents

Advertisement

Schematic Diagrams

LVDS Interface (SiS302LV)

30
30
Sheet 11 of 42
5,30
LVDS interface
5,30
AAD[19..26]
(SiS302LV)
VBCAD
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
11,30
B - 12 LVDS Interface (SiS302LV) (71-D40U0-D03)
C272
33PF(R)
L68
Y
R259
0
1
2
Y
FCM1608K-121T07
L69
C
1
2
C
2.7UH
D24
D25
DA204U(R)
DA204U(R)
R260
C275
33PF(R)
R252
C297
C273
75
C300
C276
75
330PF
330PF
330PF
330PF
+3VS
VAGCLK
5
VAGCLK
5
VAHSYNC
5
VAVSYNC
AAD[0..15]
AAD[0..15]
AAD[19..26]
+3VS
R332
4.7K(R)
DVDD
103
DVDD/DVDD4
AAD16/VADE
104
5,30
AAD16/VADE
DE2/VADE
DGND
105
FLD/STL2/DVSS4
106
T
AS/RESERVED
VBCAD
107
5
VBCAD
SPD/VBCAD
VBHCLK
108
5
VBHCLK
DGND
SPC/VBHCLK
109
HIN/DVSS5
DVDD
110
VIN/DVDD5
VREF2
111
VREF2/OVDD
112
T
SDD/GPIOA(GPI)
113
SDC/GPIOB(GPI)
114
T
DD1/GPIOC(GPI)
115
LDDCDATA
DC1/GPIOD(GPI)
R385
100
116
T
DD2/LDDCDATA
LDDCCLK
R386
100
117
DC2/LDDCCLK
V5V
118
V5V/V5V
119
HOUT/V2HSYNC
120
VOUT/V2VSYNC
121
HPD/LCDSENSE
INTA#
122
9,13,30
INTA#
PCIRST#
HPINT*/INTA#
123
9,13,14,20,22,24,30
PCIRST#
GPIO[0]/EXTRSTN
124
GPIO[1]/PFTEST1
+3VS
125
T
GPIO[2]/PFTEST2
R719
4.7K
126
GPIO[3]/PFTESTO
ENAVDD
127
11,30
ENAVDD
ENAVDD/GPIOG(GP
ENABKL
128
11,30
ENABKL
ENABKL/GPIOH(GP
LDC0-
LDC0-
LDC0+
LDC0+
LDC1-
LDC1-
LDC1+
LDC1+
LDC2-
LDC2-
LDC2+
LDC2+
LDC3-
LDC3-
LDC3+
LDC3+
LL1C-
LL1C-
LL1C+
LL1C+
LDC4-
LDC4-
LDC4+
LDC4+
LDC5-
LDC5-
LDC5+
LDC5+
LDC6-
LDC6-
LDC6+
C387
LDC6+
LDC7-
LDC7-
LDC7+
LPLLVDD
NC
LDC7+
LL2C+
LL2C+
LL2C-
LVDD1
LL2C-
301LV/302LV:R894/R895
JTV2
4
3
2
1
SVIDEO CON
PIN(GND1,GND2)=GND
VBGCLK
VBGCLK 5
AAD28/VBCTL0
5,30
VBHSYNC 5
VBVSYNC 5
U19
DVDD
64
DVDD1/DVDD
AAD27/VBDE
63
VBDE/DE1
AAD29/VBCTL1
62
VBCTL1/FLD/STL1
DGND
61
DVSS1/VREF1
60
VDDV
OVDD/VDDV
59
VBCLK
VBCLK/P-OUT
DGND
58
DVSS0/RESET*
57
TVCLKO/GPIO[5]
56
TSCLKI/GPIO4
DVDD
55
DVDD0/TVPLL_VDD
TVPLLVDD
54
PLL1VDD/TVPLL_V
53
VBOSCO
VBOSCO/XO
52
VBRCLK
VBRCLK(XIN)/XIN
TVPLLGND
51
PLL1GND/TVPLL_G
50
RESERVED/BOC/VS
49
IOCS/C/HSYNC
DAC_GND
48
DAC_GND/DAC_GND
DAC_VDD
47
DAC_VDD/DACA3
46
RESERVED/DACB3
C
45
IOC/DACA2
44
RESERVED/DACB2
Y
43
IOY/DACA1
42
RESERVED/DACB1
COMPOSITE
41
IOCOMP/DACA0
V2COMP
40
V2COMP/DACB0
39
DAC_GND
DAC_GND/DAC_GND
SIS302LV(R)
R299
147
R300
6K
R48
NC
R301
2K
C349
1UF
R47
0
+3VS
L19
LVDD1
FCM1608K121(R)
C52
C386
10U/10V(R)
0.1UF
+3VS
L100
LVDD2
FCM1608K121(R)
C348
C384
10U/10V(R)
0.1UF
+3VS
R54
2.2K
LDDCDATA
L15
+3VS
VDDV
R55
2.2K
LDDCCLK
FCM1608K121(R)
C56
C55
10U/10V(R)
0.1UF
+3VS
L121
FCM1608K121(R)
C461
C51
N15
10U/10V(R)
0.1UF
C409
+3VS
AAD27/VBDE
5,30
L93
AAD29/VBCTL1
5,30
NC/0.1uF
FCM1608K121(R)
C318
C382
VBCLK
5
N11
10U/10V(R)
0.1UF
T
+5VS
+3VS
L111
V5V
FCM1608K121(R)
C424
C49
C507
C389
T
N12
10U/10V(R)
0.1UF
0.1UF
10U/10V(R)
T
T
T
+3VS
+3VS
L22
L20
VREF2
FCM1608K121(R)
FCM1608K121(R)
C67
C308
C53
N2
0.1UF
0.1UF
10U/10V(R)
Choose clock source:main board/crystal
R1 :NC/22
+3VS
Spread
range:R120:+-1.5%/+-2.5%
L18
Y2
VBOSCO
VBRCLK
FCM1608K121(R)
R353
10
C462
C50
C440
14.318MHZ(R)
C423
10U/10V(R)
0.1UF
22P
22P
C385
0.1UF
LGND
C383
0.1UF
LGND
DVDD
C44
0.1UF
DGND
V2COMP
DAC_VDD
C422
0.1UF
DAC_GND
LPLLVDD
C388
0.1UF
LPLLGND
TVPLLVDD
C54
0.1UF
TVPLLGND
DVDD
C463
0.1UF
DGND

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the D400V and is the answer not in the manual?

This manual is also suitable for:

D410vXe311

Table of Contents