Circuit Description - Panasonic KV-S3065CL SERIES Service Manual

KV-S3065CLSERIES / KV-S3065CWSERIES

11 CIRCUIT DESCRIPTION

11.1. Block Diagram-1 (Image Processing)
On this system, CPU (IC1024) controls the operation for Interface Controllers (SCSI, USB), Gate Arrays (IC2045, IC2046, IC2047),
Sensors (Paper Sensor and others), Motors (Paper Feed, Conveyor, Carriage)
Motor pulse signals for the paper feed scanning on the ADF mode are provided from the CPU (IC1024), directly.
On the other hand, motor pulse signals for conveying paper on the ADF mode are provided from the Gate Array (IC2045).
This scanner has 2 CISs (CIS (Front), CIS (Back)) to scan image signals for front and back sides respectively.
Both of them are used for duplex scanning on the ADF mode. (When scanning on the Flatbed, only a CIS (Front) is available)
The Gate Array (IC2045) works as the controller of CIS (Front) and AD converters (IC1010, IC1011) to preprocess the front image
data.
And the Gate Array (IC2046) works as the controller of CIS (Back) and AD converters (IC1012, IC1013) to preprocess the back
image data.
After finishing this, the Gate Array (IC2047) postprocesses data from the Gate Arrays (IC2045 and IC2046) respectively to be
binary or compressed data, and to be sent to PC via PC Interface (USB or SCSI).
Image processing is as follows.
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