Intel 80302 Specification Update page 35

20. Table 8-17 on page 8-38 has incorrect data
The bit locations for External Interrupt 5 are incorrectly shown as bits '9:4'. It should be '7:4'.
Problem:
Replace Table 8-17 with the following:
Workaround:
31
IOP
rv rv rv
Attributes
PCI
na na na
Attributes
® ®
Intel i960
IMAP1
Bit Default
31:16 Reserved (initialize to 0)
Default
15:12 External Interrupt 7 Field - IMAP1.x7
Value loaded
11:8 from image External Interrupt 6 Field - IMAP1.x6
in Control
7:4 External Interrupt 5 Field - IMAP1.x5
Table
3:0 External Interrupt 4 Field - IMAP1.x4
®
Intel 80303 I/O Processor Developer's Manual
Affected Docs:
21. Section 11.2.8 on page 11-5 has incorrect data
The last sentence in the third paragraph states, 'Specifications for a cold and warm reset can be
Problem:
found in the 80960RM I/O Processor Data Sheet and the 80960RN I/O Processor Data Sheet.'
This sentence should be removed, it does not pertain to the 80303 I/O processor.
Change text to the following: 'The 80303 I/O processor complies with the PCI Local Bus
Workaround:
Specification, Revision 2.2. Reset parameters are defined in this specification.'
®
Affected Docs: Intel 80303 I/O Processor Developer's Manual
22. Section 13.2.3.1 on page 13-13 has incorrect data
The first sentence states, 'The MCU supports an ECC only memory subsystem ranging from 32 to
Problem:
528 Mbytes.' It should be 512 Mbytes, not 528 Mbytes.
Change this sentence to the following: 'The MCU supports an ECC only memory subsystem
Workaround:
ranging from 32 to 512 Mbytes.'
®
Affected Docs: Intel 80303 I/O Processor Developer's Manual
23. Table 13-4 on page 13-9 has incorrect data
Table 13-4 lists incorrect wait states for the flash bus.
Problem:
Replace Table 13-4 with the following:
Workaround:
®
Affected Docs: Intel 80303 I/O Processor Developer's Manual
®
Intel 80303 and 80302 I/O Processors Specification Update
28 24 20
rv rv rv rv rv rv rv rv rv
na na na na na na na na na na
Core internal bus address
FF00 8524H
Flash Speed
<= 55 ns
<= 115 ns
<= 175 ns
16 12
rv rv rv rv rw rw rw rw rw rw
na na na na na na na na na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
Description
Address-to-Data Wait States
8
12
20
Documentation Changes
8 4
rw rw rw rw rw rw rw rw rw rw
na na na na na na na na na na
RW = Read/Write
RC = Read Clear
RO = Read Only
NA= Not Accessible
Recovery Wait States
4
4
4
0
35