General Description Of The Adsst-73360Lar Adc - Analog Devices ADSST-EM-3040 Manual

GENERAL DESCRIPTION OF THE ADSST-73360LAR
ADC
The ADSST-73360LAR is a 6-channel input analog front end
processor for general-purpose applications, including industrial
power metering or multichannel analog inputs. It features six
16-bit A/D conversion channels, each of which provides 76 dB
signal-to-noise ratio over a dc to 4 kHz signal bandwidth. Each
channel also features an input programmable gain amplifier
(PGA) with gain settings in eight stages from 0 dB to 38 dB.
VINP1
VINN1
VINP2
VINN2
VINP3
VINN3
REFCAP
REFOUT
VINP4
VINN4
VINP5
VINN5
VINP6
VINN6
SIGNAL
0/38DB
CONDITIONING PGA
SIGNAL
0/38DB
CONDITIONING
PGA
SIGNAL
0/38DB
CONDITIONING
PGA
REFERENCE
SIGNAL 0/38DB
CONDITIONING PGA
SIGNAL
0/38DB
CONDITIONING
PGA
SIGNAL
0/38DB
CONDITIONING
PGA
Figure 6. ADSST-73360LAR Functional Block Diagram
The ADSST-73360LAR is particularly suitable for industrial
power metering as each channel samples synchronously, ensur-
ing that there is no (phase) delay between the conversions. The
ADSST-73360LAR also features low group delay conversions on
all channels.
An on-chip reference voltage is included with a nominal value
of 1.2 V.
The ADSST-73360LAR is available in a 28-lead SOIC package.
SIGNAL
Σ-∆
DECIMATOR
CONDITIONING
SIGNAL
Σ-∆
DECIMATOR
CONDITIONING
SIGNAL
Σ-∆
DECIMATOR
CONDITIONING
ADSST-73360LAR
SIGNAL
Σ-∆
DECIMATOR
CONDITIONING
SIGNAL
Σ-∆ DECIMATOR
CONDITIONING
SIGNAL
Σ-∆
DECIMATOR
CONDITIONING
Rev. 0 | Page 11 of 24
ADSST-SALEM-3T
SDI
SDIFS
SCLK
RESET
SERIAL
MCLK
I/O
PORT
SE
SDO
SDOFS
03738- 0- 004