Analog Devices ADSP-2186 Specification Sheet page 23

Parameter
IDMA Address Latch
Timing Requirements:
t Duration of Address Latch
IALP
t IAD15–0 Address Setup before Address Latch End
IASU
t IAD15–0 Address Hold after Address Latch End
IAH
t IACK Low before Start of Address Latch
IKA
t Start of Write or Read after Address Latch End
IALS
NOTES
1
Start of Address Latch = IS Low and IAL High.
2
Start of Write or Read = IS Low and IWR Low or IRD Low.
3
End of Address Latch = IS High or IAL Low.
REV. 0
1, 3
2, 3
IACK
t
IKA
IAL
IS
IAD 15–0
IRD
OR
IWR
Figure 20. IDMA Address Latch
Min
10
3
5
3
2
0
2, 3
3
t
IALP
t
t
IASU IAH
t
IALS
–23–
ADSP-2186
Max Unit
ns
ns
ns
ns
ns