Xerox 550 Reference Manual page 92

programming considerations, the initial TSA is a specific
value either as the result of a Mode 0, WRITE DIRECT
instruction or as the result of a PSS or PLS instruction, as
described below.
During each PSS instruction, the memory stack is accessed
28 times and the TSA is incremented by 1 before each access.
The first memory stack location accessed has a relative ad-
dress equal to the initial TSA plus 1, ... , and the 28th mem-
ory stack location accessed has
ci
relative address equal to
the initial TSA plus 28. Although 28 memory stack loca-
tions are accessed in an ascending sequence, only 20 loca-
tions (as selected by the hardware) wi II contain the basic
processor environment. Eight locations' (whose contents are
designated as "indeterminate", in Figure 12) are reserved
and must not be used.
For each PLS instruction, access to the memory stack is
contingent upon the Word Count as described subsequently.
If
access is permitted, the memory stack is accessed 28 times
and the TSA is decremented by 1 after each access. The
first memory stack location accessed by a PLS instruction
has a relative address equal to the initial TSA, the second
memory stack location accessed has a relative address equal
to the initial TSA minus 1, ... , and the 28th memory stack
location accessed has a relative address e'-'val to the initial
TSA minus 27. Although 28 memory stack "locations are
accessed in a descending sequence, the hardware selects
and pulls the contents of only 20 locations containing valid
information, as shown in Figure 12, and loaded into the
general registers and PSWs. The contents of eight locations
designated as indeterminate are ignored.
If the terminal (last) TSA for a PSS or PLS instruction is
not modified by a Mode 0 WRITE DIRECT instruction, it
may be used as the initial TSA for a subsequent PSS or PLS
instruction. Each PSS instruction causes the memory stack
to be increased by 28 word locations and each PLS instruc-
tion causes the memory stack to be decreased by 28 word
locations. The information is pushed and pulled on a last-in,
fi rst-out basi s.
Note: The PLS instruction is contingent upon the Word
Count value, as described below.
SPACE COUNT
The Space Count field (bit positions 33-47) of the Status
Stack Pointer Doubleword is a 15-bit counter that may con-
tain a value of 0 through 32,767. Depending upon pro-
gramming considerations, the initial Space Count is a
specific value e. ther as the result of executing a Mode 0,
WRITE DIRECT instruction or a PLS or PSS instruction.
During a PSS instruction, the Space Count is decremented
by 1 for each word pushed into the memory stack. If the
Space Count is decremented to a value of zero before all
the words have been pushed, the PSS instruction continues
(i. e., no trapping occurs). The environment is stored into
appropriate memory stack locations as specified by the
TSA; however, subsequent values of the Space Count are
indeterminate.
During a PLS instruction, the Space Count is incremented
by 1 for each word pulled from the memory stack. If the
Space Count is incremented beyond a value of 32,767, bit
position 32 is set to 1 (signifying an overflow condition);
however, the PLS instruction continues (i. e., no trapping
occurs).
Note: Once bit position
~2
has been set to a 1, it can be
reset to a 0 only by executing a Mode 0, WRITE
DIRECT instruction. That is, bit position 32 can
not be reset to a 0 by the decrementing process per-
formed during a PSS instruction.
WORD COUNT
The Word Count field (bit positions 49-63) of the Status
Stack Pointer Doubleword is a 15-bit counter that may con-
tain a value of 0 through 32,767. Depending upon pro-
gramming considerations, the initial Word Count is a
specific value either as the result of executing a Mode 0,
WRITE DIRECT instruction or as the result of executing a
PSS or PLS instruction.
During a PSS instruction, the Word Count is incremented
by 1 for each word pushed into the memory stack. Thus,
the terminai Word Count for a PSS instruction exceeds the
initial Word Count by 28. If the Word Count value
exceeds 32,767, bit position 48 is set to a 1 (signifying
that an overflow condition has occurred); however, the
PSS instruction continues the stacking operation (i. e., no
trapping occurs).
If the initial Word Count for a PLS instruction is equal to
or greater than 28, the Word Count is decremented by 1 for
each word pulled from the memory stack and the terminal
Word Count will be 28 less than the initial Word Count.
Note that if bit position 48 was set to a 1 by a PSS instruc-
tion previously, it can not be reset to a 0 by the decrement-
ing performed during a PLS instruction.
If the initial Word Count for a PLS instruction is equal to
zero, the parameters within the Status Stack Pointer Double-
word are neither effective nor affected by the PLS il)struc-
tion. However, default PSWs are loaded from real memory
locations 2 and 3.
If
the initial Word Count for a PLS instruction is less than 28
and not equal to zero, the other parameters of the Status
Stack Pointer Doubleword are not effective and none of the
parameters are affected by the PLS instruction. Instead the
BP traps to location X ' 4D' (instruction exception trap) and
TCC2 is set.
Push-Down Instructions (Privileged) 85