Fss; Fsl; Condition Code Settings For Floating-Point Instructions - Xerox 550 Reference Manual

Computer
Hide thumbs Also See for 550:
Table of Contents

Advertisement

Table 8.
Condition Code Settings for Floating-Point Instructions
Condition Code
1
2
3
4
Meaning
If
No Trap to Location X'44'
Meaning If Trap to Location X'44' Occurs
0
0
0
0
A x 0,
a/A,
or
-A + A(f)
with
FN= I )
*@
0
0
0
1
N
<
0
Normal
*
resu Its
0
0
1
0
N >0
*
0
1
0
0
*@
Divide
by
zero
)
0
1
0
1
*
Overflow, N
<
0
Always trapped
0
1
1
0
*
Overflow, N >0
0
0
0
-A +A
FS=O
@[:
-A + A(f)
)
0
0
1
N
<
0
>
2
P t
I
FN = 0, and
N
<
0)
rs=
I FN=O
os norma -
>
2
Postnormal-
d '
d
'
}
0 0
h0ft
no underflow
. .
.
an
no un er-
a.
1
0
N>O
IZlngs
I S
N >0
IZlng shifts
flow with FZ=
1
1
1
0
0
Underflow with FZ=O and no trap by FS= 10
*
1
1
0
1
*
1
1
1
0
*
Notes:
(j)
Result set to "true" zero
@
"*,,
indicates impossible configurations
®
Applies to add and subtract only where FN = 0
The R field of the FAL instruction must be an even value
for proper operation of the instruction; if the R field of FAl
is an odd value, the instruction traps to location X'4D',
instruction exception trap.
FSS
FLOATING SUBTRACT SHORT
rNord index alignment)
H
3ci
R
I X
I:
Referenc~
address
I
0 1 2 3 1 4 5 6 7 8
9
1011121314151617181912021222324252627128293031
The effective word and the contents of register R are loaded
into a set of internal registers.
FLOATING SUBTRACT SHORT forms the two's complement
of the effective word and then operates identically to
FLOATING ADD SH ORT
(FAS),
If
no flo(lting-po!n t
arithmetic fault occurs, the difference is loaded into reg-
ister R as a short-format floating-point number.
Affected: (R), CC
(R) - EW- R
Trap: Floating-point arith-
metic fault
78
Floating-Point Arithmetic Instructions
FSL
lC
o
1
2
Underflow,
N
<
a}
FZ= 1
Underflow, N >0
FLOATING SUBTRACT LONG
(Doubleword index alignment)
I
R
I
X
II
Reference
l
address
I
718
10 11112 13 14 115116 17 18 1912021 22 23124 25 26 27128 29 30 31'
The effective doubleword and the contents of registers R
and Ru 1 are loaded into a set of internal registers.
FLOATING SUBTRACT LONG forms the two's comple-
ment of the effective doubleword and then operates iden-
tically to FLOATING ADD LONG (FAL).
If
no floating-
point arithmetic fault occurs, the difference is loaded into
registers Rand Ru 1 as a long-format floating-point number.
Affected: (R), (Ru
1),
CC
(R, Rul) - ED - R , Ru1
Trap: Floating-point arith-
metic fault, instruc-
tion exception
The R field of the FSL instruction must be an even value for
proper operation of the instruction; if the R field of FSL is
an odd value, the instruction traps to location X'4D',
instruction exception trap.

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents