Conversion Instructions; Cva; Cvs - Xerox 550 Reference Manual

4. At the completion of the left shift operation, the
floating-point result is loaded back into the general
register{s}.
If
the number was origina"y negative, the
twols complement of the resultant number is loaded
into the general register {s}.
5.
The condition code settings following a floating-point
left shift are as follows:
2 3
4
Result
- - 0 0
"True" zero (all
OIS).
- - 0
Negative.
o
0
o
Positive.
C digits shifted (fraction unnormalized,
no characteristic underflow).
- Fraction normalized {includes "true"
zero}.
- Characteristic underflow.
A
negative shift count produces the following right shift
operations (again assuming that negative numbers are twols
complemented before and after the shift operation):
1.
The fraction field is shifted
1
hexadecimal digit posi-
tion to the right and the characteristic field is incre-
mented by
1.
Vacated digit positions at the left are
fi lIed with hexadecimal
OIS.
2. If the characteristic field overflows
(i.
e., is all
OIS
as
the result of being incremented), CC2 is set to
1.
However, if the characteristic field does not overflow,
the shift process (shift fraction, and increment char-
acteristic) continues until the characteristic field
overflows or unti
I
the fraction is shifted right
lei
hexa-
decimal digit positions, whichever occurs first. (Both
terminating conditions can occur simultaneously.)
3. If the resultant fraction field is all
OIS,
the entire
floating-point number is set to all
OIS
C'true" zero),
regardless of the sign and the characteristic of the
original number.
4. At the completion of the right shift operation, the
floating-point result is loaded back into the general
register{s}. If the number was originally negative,
the twols complement of the resu Itant number is loaded
into the general register(s}.
5. The condition code settings following a floating-point
dght sh:ft are as
fe! !ews:
2 3 4 Result
- 0 0 "True" zero (all zeros).
- 0
Negative.
72 Conversion Instructions
2 3
4 Result
0
Positive.
0
0
IC/
digits shifted (no characteri sti c
overflow).
0 Characteristi c overflow.
Floating Shift, Single Register
The short-format floating-point number in register R is
shifted according to the rules established above for floating-
point shift operations.
Affected: {R}, CC
Floating Shift, Double Register
The long-format floating-point number in registers Rand
Ru
1
is shifted according to the rules established above for
floating-point shift operations.
(If the R field of the in-
struction word is an odd value, a long-format f/oating-
point number is generated by duplicating the contents of
register R, and the 32 high-order bits of the result are
loaded into register R. )
Affected: {R}, (Rul), CC
CONVERSION INSTRUCTIONS
The conversion instructions are:
Instruction Name Mnemo'nic
Convert by Addition CVA
Convert by Subtraction CVS
These two conversion instructions can be used to accom-
plish bidirectional translation between binary code and any
other weighted binary code, such as BCD.
The effective addresses of the instructions CONVERT BY
ADDITION and CONVERT BY SUBTRACTION each point
to the starting location of a conversion table of 32 words,
containing weighted values for each bit position of regis-
ter Ru 1. The 32 words of the conversion table are con-
sidered to be 32-bit positive quantities, and are referred