Panasonic DP-CL18 Technical Manual page 63

DP-CL18
3.6.9. Communication between ASIC1 (IC15) and ASIC2 (IC24)
When transferring the data from the hard disk (HDD), communicating with the network, etc are performed, the CPU controls ASIC2
and transfers the data using IO bus to communicate between ASIC1 (IC15) and ASIC2 (IC24).
The IO bus is the synchronized 16 bit bus. All signals on the IO bus are synchronized with the signals IOCLK1 and IOCLK2.
The IO bus have two functions (IO access and DMA transfer). When the CPU accesses the register in ASIC2, the IO access is
used. This transfer is controlled by the chip select signal NIOCCS and the wait signal NIOWIAT.
When communicating between the SO-DIMM (memory) and ASIC2, the DMA transferring is used. This transfer is controlled by the
bus request signal NIOBR, the bus grant signal NIOBG and the data acknowledge signal NIODACK.
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