Panasonic DP-CL18 Technical Manual page 60

DP-CL18
3.6.6. Video Interface between Main Control Board and Engine Control Board
The printing data signals NVD0~3 are 4 bit signal for each color (cyan, magenta, yellow, black) and are sent from ASIC1 (IC15) on
the main control board to IC14 (ASIC) on the engine control board through connectors CN8. ASIC1 on the main control board
sends the video data NVD0~3 & video clock DCLK to IC14 on the engine control board while synchronizing with the horizontal
synchronized signal NHSYNC and vertical synchronized signal NVSZ. One cycle of video clock DCLK is 60 nsec (include spread
spectrum -1.7%) because the spread spectrum clock generator (IC9) is used as clock generator. The video data NVD0~3 are
fetched by the raising edge of video clock DCLK.
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