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•
DESTINATION SAS ADDRESS:
The SAS address when an initiator makes a connection request
•
SOURCE SAS ADDRESS:
The SAS address of the drive
•
PATHWAY BLOCKED COUNT:
At the time of the first connection request, this field is set to 0h. Otherwise, it
indicates how many times the OPEN_REJECT (PATHWAY BLOCKED)
primitive has been received.
•
ARBITRATION WAIT TIME:
At the time of the first connection request, this field is set to 0h. When a
drive's connection request is unsuccessful due to arbitration fairness at the
time of sending an OPEN frame, this field of the next OPEN frame indicates
the time that has elapsed since the first connection request.
1.5.4 Identification and hard reset sequence
After the phy reset sequence has been completed indicating the physical link is
using SAS rather than SATA, each phy transmits either:
a) an IDENTIFY address frame; or
b) a HARD_RESET.
Each phy receives an IDENTIFY address frame or a HARD_RESET from the phy
to which it is attached. The combination of a phy reset sequence, an optional hard
reset sequence, and an identification sequence is called a link reset sequence (See
Section 1.3.2).
If a device supports more than one phy, it shall transmit the same SAS address on
all phys for which it is capable of sharing within a port.
If a device detects the same SAS address incoming on different phys, it shall
consider those phys part of the same wide port.
If a device detects different SAS addresses incoming on different physical links, it
shall consider those physical links as independent physical links and consider
those phys part of different ports.
If a device does not receive a valid IDENTIFY address frame within 1 ms of phy
reset sequence completion, it shall restart the phy reset sequence.
If a device receives an additional IDENTIFY address frame after receiving the
first one, without an intervening phy reset sequence, it shall ignore the additional
IDENTIFY address frame.
If a phy receives a HARD_RESET, it shall be considered a reset event and cause
a hard reset (device initialization of the port) of the port containing that phy.
After a hard reset, a phy begins a link reset sequence.
C141-C009
1.5 Address frames
1-45
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