Table of Contents
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Index
FORMAT UNIT command defect
processing.........................................4-155
FORMAT UNIT command parameter
list configuration ..............................4-149
FOV .......................................................4-150
FSW .........................................................4-49
G
G list ...............................................4-147, 6-1
G list bit .................................................4-162
general usage application client
parameter data ..................................4-111
generation of UNIT ATTENTION
condition...............................................2-9
global logging target save disable ...........4-52
GLTSD ....................................................4-52
GOOD status..............................................2-6
group code .................................................2-3
grown defect list ....................................4-147
grown list bit..........................................4-162
H
handling illegal CDB.................................2-5
HARD RESET................................2-17, 2-18
hard sectoring ..........................................4-40
HARD_RESET........................................1-29
hashed SAS address.................................1-10
hashed SAS address code parameter .......1-10
head offset count......................................4-29
header ......................4-22, 4-76, 4-150, 4-162
header + data, with address
specification ..........................4-182, 4-188
header + data, without address
specification ..........................4-181, 4-187
HSEC .......................................................4-40
I
IC ............................................................4-47
identification and hard reset sequence ....1-45
IDENTIFY address frame .......................1-40
idle physical link .....................................1-37
ILI ..............................................................5-3
illegal LUN specification ........................2-15
immed ....................................................4-151
immediate ..............................................4-151
incorrect length indicator...........................5-3
IN-4
information.................................................5-3
information unit .......................................1-61
information unit supported bit ...................4-8
informational exception control page ......4-64
INIT error recovery method.....................5-14
initialization during installation.................6-4
initiator control enable.............................4-47
INQUIRY (12) ...........................................4-2
INQUIRY command................................2-11
interleave factor .......................................4-39
interlocked frame .....................................1-53
INTERMEDIATE CONDITION MET
status .....................................................2-7
INTERMEDIATE status............................2-7
interval timer............................................4-67
issuing FORMAT UNIT command ...........6-5
issuing MODE SELECT command ...........6-4
I-T nexus loss occur ...................................2-9
IUS bit........................................................4-8
L
LBCSS .....................................................4-49
LBIN ........................................................4-90
LED display .............................................2-14
link .............................................................2-5
link layer ..................................................1-24
link reset sequence ...................................1-12
link reset sequence, start condition..........1-13
list parameter............................................4-91
log error....................................................4-64
log parameter ...........................................4-93
LOG SELECT (4C) .................................4-87
LOG SELECT command parameter
configuration.......................................4-88
LOG SENSE (4D)....................................4-91
LogErr ......................................................4-64
logical block address..................................2-4
logical block addressing...........................2-23
logical block cache segment size.............4-49
logical or physical notch ..........................4-56
logical unit reserve function ....................4-82
LOGICAL UNIT RESET ........................2-17
LOGICAL UNIT RESET ........................2-18
logical unit scope ...................................4-124
logical unit self-test................................4-174
C141-C009
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