C141-E123-01EN MAN3184, MAN3367, MAN3735 SERIES DISK DRIVES SCSI PHYSICAL INTERFACE SPECIFICATIONS...
High Safety Required Use. If you wish to use this Product for High Safety Required Use, please consult with our sale person in charge before such use The contents of this manual is subject to change without prior notice. All Rights Reserved. Copyright 2001 FUJITSU LIMITED...
“Important Alert Items” in this manual. Keep this manual handy, and keep it carefully. FUJITSU makes every effort to prevent users and bystanders from being injured or from suffering damage to their property. Use the product according to this manual.
Specifications and functions of products covered by this manual comply with the following standards. Standard (Text) No. Name Enacting Organization T10/1302D Rev 14 Working Draft American National (final) American National Standard Information Standards Institute Technology --- SCSI Parallel Interface 3 (ANSI) All Rights Reserved, Copyright 2001 Fujitsu Limited C141-E123-01EN...
REVISION RECORD Edition Date Revised contents published Mar.,2001 Specification No.: C141-E123-**EN The contents of this manual is subject to change without prior notice. All Rights Reserved. Copyright 2001 FUJITSU LIMITED C141-E123-01EN...
PREFACE This manual explains the MAN3184/MAN3367/MAN3735 series 3-1/2" intelligent disk drives each having the built-in SCSI controller. This manual details the specifications and functions of the Small Computer System Interface (SCSI) to connect the above listed disk drives to the user system. Also, the manual details various SCSI command specifications and the command processing functions, and provides the information required to creation of host system software.
CONVENTIONS This manual uses the following conventions: NOTE: NOTE indicates the information useful for the user to operate the system. Important information The important information is provided with the "Important" title. The important information text is centered so that the reader can distinguish it from other manual texts. The following gives an example: IMPORTANT The IDD operates as a target (TARG) on the SCSI bus.
Requesting for User's Comments Please use the User's Comment Form attached to the end of this manual to identify user comments including error, inaccurate and misleading information of this manual. Contact to your Fujitsu representative for additional comment forms if required.
MANUAL ORGANIZATION Product/ • General Description Maintenance Manual • Specifications • Data Format • Installation Requirements • Installation • Diagnostics and Maintenance • Error Analysis • Principle of Operation SCSI Physical • SCSI Bus Interface • SCSI Message Specifications • Error Recovery •...
1.34 Bus phase sequence........................1 - 77 1.35 Example of bus phase transition at execution of a single command ..........1 - 79 1.36 State of level-1 SCAM target.....................1 - 86 1.37 State of level-2 SCAM target.....................1 - 87 1.38 Comparison of active negate current and voltage ..............1 - 92 1.39 Single-ended test circuit......................1 - 93 1.40...
TABLES page INFORMATION TRANSFER phase identification ..............1 - 6 Single-Ended maximum distance between terminators ..............1 - 7 LVD maximum distance between terminators ................1 - 8 SE and LVD Transmission line impedance of cable at maximum indicated data transfer rate.........................1 - 15 Attenuation Requiaments for SCSI cable media ................1 - 15 Output characteristic ........................1 - 19 Input characteristic........................1 - 19...
CHAPTER 1 SCSI BUS System Configuration Interface Signal Definition Physical Requirements Electrical Requirements Timing Rule Bus Phases Bus Conditions Bus Phase Sequence SCAM 1.10 Ultra SCSI 1.11 Low-Voltage Differential 1.12 SCSI Bus Fairness This chapter describes the configuration, physical and electrical characteristics, interface protocol, and operations of SCSI buses.
Any SCSI ID of the IDD can be selected using the setup pins. However, the LUN is fixed to zero (0). The SCSI ID can be 0 to 15. Note: The maximum number of SCSI devices and the maximum cable length are limited depending on the selected SCSI data transfer mode and the SCSI transceiver type.
Interface Signal Definition Figure 1.2 shows interface signal types. The SCSI bus consists of 27 signal lines. The 27 signal lines consist of data buses (2 bytes plus two odd parity bits) and 9 control signal lines. The SCSI bus can be a single-ended or low voltage differential(LVD) interface depending on the model used.
DB15 to DB00, P1, P_CRCA (Data buses) The 16-bit SCSI system uses a bidirectional data bus consisting of two-byte data and two odd parity bits. MSB (2 ): DB15, LSB (2 ): DB00 The data bus is used to transfer a command, data, a status, or a message in the INFORMATION TRANSFER phase.
(d) P1 (data group transfer enabled) A signal that shall be continuously negated by the SCSI device driving the DB(15-0) signals and shall be ignored by the SCSI device receiving the DB(15-0) signals during DT DATA phases. (e) P_CRCA (PARITY/CRC AVAILABLE) (SELECTION phase, ST DATA phase, COMMAND phase, MESSAGE phase, or STATUS phase) A signal sourced by the SCSI device driving the data bus during these phases.
BSY (BUSY) The BSY signal indicates that the SCSI bus is in use. In the ARBITRATION phase, this signal is used to request for the bus usage priority. SEL (SELECT) The SEL signal is used by the INIT to select a TARG (in the SELECTION phase) or by the TARG to reselect an INIT (in the RESELECTION phase).
REQ (REQUEST) This is a transmission request from the TARG to the INIT in the INFORMATION TRANSFER phase. ACK (ACKNOWLEDGE) The ACK signal is a response to the REQ signal sent from the INIT to TARG in the INFORMATION TRANSFER phase. ATN (ATTENTION) The ATN signal indicates that the INIT has a message to be sent to the TARG.
Table1.3 LVD maximum distance between terminators Maximum distance between terminators (meters) Interconnect Fast-5 Fast-10 Fast-20 Fast-40 Fast-80 Point-to-point Multidrop 1.3.1 Interface connector Interface connector of the 16-bit SCSI The IDD 16-bit SCSI bus connector is nonshielded 68-pin, consisting of two 34-pin rows with adjacent pins 1.27 mm (0.05 inch) part (Figure 1.4).
Interface connector of SCA-2 type 16-bit SCSI The 16-bit, SCA-2 type SCSI bus connectors of the IDD are 80-pin, unshielded connectors, each having two rows of 40 parallel pins (separated 1.27 mm or 0.05" from each other) (see Figure 1.8). Figure 1.9 shows the pin assignment of 16-bit, SCA-2 type single-ended SCSI interface connector.
1.3.2 Interface cable Use the twisted-pair interface cables satisfying the requirements of Tables 1.4 ,1.5. Table 1.4 SE and LVD Transmission line impedance of cable at maximum indicated data transfer rate Local SE transmission line Local differential impedance transmission line impedance Description Minimum Maximum...
Electrical Requirements 1.4.1 Single-Ended type Termination circuit All signals except for RESERVE, GND, or TERMPWR should be terminated at both ends of the bus. Each signal should be terminated by one of the following methods. Figures 1.12 and 1.13 show the termination circuit. a) Each signal must connect to the TERMPWR signal through 220 (within 5%) resistor, and connect to ground through 330...
Driver and receiver For the interface signal driver, an open-collector or tri-state buffer that satisfies the following output characteristics is used. All signals are negative logic (true = "L"). The receiver and non-driver of the SCSI device under the power-on state should satisfy the following input characteristics on each signal.
The SCSI device under the power-off state should satisfy the characteristics of I and I [Recommended circuit example] Driver: MB463 (Fujitsu) or SN7438 (TI) (Open-collector NAND gate) Receiver: SN74LS240 or SN74LS19 (TI) (Shumitt trigger input inverter) 1.4.2 Low-Voltage Differential type Termination circuit All signals except for GROUND and TERMPWR should be terminated at both ends of the bus.
DIFFSENS a) DIFFSENS driver The LVD DFFSENS driver sets a voltage level on the DIFFSENS line that uniquely defines a LVD transmission mode. LVD terminators and multimode terminators shall provide a LVD DIFFSENS driver according to the specifications in Table 1.8. Table 1.8 LVD DIFFSENS driver specifications Value...
a) The device is capable of logical operation for at least 100 ms, and Notes: The 100 ms delay allows time for the DIFFSENS pin to connect after the initial power connection (in the case of insertion of a device into an active system), or allows time for the power distribution system to settle.
MATED 1/Backplane Side The signal shall be held to a ground level when the MATED 2 connection is completed. The MATED 1 signal shall be held to the open level when the MATED 2 connection is not completed. MATED 2 connection Figure 1.15 Circuit for mated indications 1.4.3...
Figure 1.16 shows the configuration of a SCSI terminating resistor circuit. The circuit shall be set in either mode (by the CN2 setup pin) depending on the IDD system requirements. 16-bit SCSI (P-connector) setting terminal CN2 23-24pin Supply TERMPWR to SCSI Bus Short Don’t supply TERMPWR to SCSI Bus Open...
1.4.4 Usage in 8-bit/16-bit transfer mode When the IDD is used as 8-bit SCSI device, it is connected terminating resistor circuit to upper 8- bit and parity (DB08 to DB15 and DBP1) or short set up pin (CN2 13-14). When the IDD is used as 16-bit SCSI device, leave the set up pin Jumper setting “8/16”...
1.4.5 Signal driving conditions Signal status value Table 1.12 shows the correspondence between the input interface signal level at the receiving end and its logic state. Table 1.12 Signal status at receiving end Single-ended type signal state LVD type signal Logic state Asynchronous, Fast- state...
Signal sources Table 1.14 lists SCSI device types (or signal sources) which can drive signals in each interface operating phase. Table 1.14 Bus phases and signal sources I/O, REQ, ACK, DB15-8, DB7-0 P_CRCA C/D, DBP1 BUS FREE ARBITRATION SELECTION I&T RESELECTION I&T COMMAND...
Timing Rule 1.5.1 Timing value Table 1.15, 16, 17 give the timing required for operations on the SCSI bus. Table 1.15 SCSI bus control timing values Timing description Type Timing values Arbitration Delay min. 2.4 s Bus Clear Delay max. 800 ns Bus Free Delay min.
Table 1.17 SCSI bus data & information phase DT timing values Timing values [ns] (8) Timing description Type Fast-10 Fast-20 Fast-40 Fast-80 ATN Transmit Setup Time min. 48.4 29.2 19.6 14.8 ATN Receive Setup Time min. 13.6 3.45 Cable Skew (6) max.
Arbitration delay The minimum time a SCSI device shall wait from asserting the BSY signal for arbitration until the DATA BUS is examined to see if arbitration has been won. There is no maximum time. Bus clear delay The maximum time that for a SCSI device to release all SCSI signals after: a) The BUS FREE phase is detected (the BSY and SEL signals are both false for a bus settle delay);...
(11) Physical Disconnection delay The minimum time that a target shall wait after releasing BSY before participating in an ARBITRATION phase when honoring a DISCONNECT message from the initiator. (12) Power on to selection The recommended maximum time from power application until a SCSI target is able to respond with appropriate status and sense data to the TEST UNIT READY, INQUIRY, and REQUEST SENSE commands (See SCSI-3 Primary Commands Standard.) (13)
(20) Receive hold time For ST data transfers the minimum time required at the receiving SCSI device between the assertion of the REQ or ACK signal and the changing of the DB(15-0, P_CRCA, and/or P1) signals while using synchronous data transfers, provided P_CRCA is not transitioning with pCRC protection enabled.
(26) Transmit assertion period The minimum time that a target shall assert the REQ signal while using synchronous data transfers provided P_CRCA is not transitioning with pCRC protection enabled. Also, the minimum time that an initiator shall assert the ACK signal while using synchronous data transfers. (27) Transmit hold time For ST data transfers the minimum time provided by the transmitting SCSI device between the...
(33) pCRC Transmit hold time The minimum time provided by the transmitter between the transition of the REQ signal and the transition of the P_CRCA signal while pCRC protection is enabled. (34) pCRC Transmit setup time The minimum time provided by the transmitter between the transition of the P_CRCA signal and the transition of the REQ signal while pCRC protection is enabled.
1.5.2 Measurement point (1) SE Fast-5/10 The measurement point of Fast-5/10 is different from that of Fast-20. The Figure 1.17 is the Fast- 5/10 measurement point. Figure 1.17 Fast-5/10 Measurement Point C141-E123-01EN 1 - 35...
(3) LVD ST Data Transfer Figure 1.19 is the LVD ST Data Transfer measurement point. ** Use the crossing that yield the shorter Assertion Period and Negation Period. Figure 1.19 LVD ST Data Transfer measurement point Notes: 1. V - negated signal 2.
(4) LVD DT Data Transfer Figure 1.20 is the LVD DT Data Transfer measurement point. Figure 1.20 LVD DT Data Transfer measurement point Notes: 1. V - negated signal 2. V - asserted signal 3. t = 1.25ns minimum 4. V or V are required to drive the 100 mV at the leading edge of the transition.
Bus Phases The SCSI bus must be in one of the following eight phases: BUS FREE phase ARBITRATION phase SELECTION phase RESELECTION phase COMMAND phase DATA phase INFORMATION TRANSFER phase STATUS phase MESSAGE phase The SCSI bus can never be in more than one phase at any given time. Note: In the following bus phase conditions, signals are false unless otherwise defined.
1.6.1 BUS FREE phase All SCSI devices do not use the bus in the BUS FREE phase. SCSI devices shall detect the BUS FREE phase after SEL and BSY signals are both false for one Bus Settle Delay. SCSI devices which have detected the BUS FREE phase shall release all bus signals within one Bus Clear Delay after BSY and SEL signals become false for Bus Settle Delay.
The SCSI bus enters the BUS FREE phase when the TARG stops the BSY signal in one of the following events: When RESET condition has been detected. When TARG has received the following message normally. ABORT TASK, ABORT TASK SET, CLEAR TASK SET, LOGICAL UNIT RESET, TARG RESET, CLEAR ACA When TARG has transmitted the following message normally.
4) After waiting at least Arbitration Delay since the SCSI device asserted BSY signal, the SCSI device shall examine the value on the DATA BUS to determine the priority of the bus arbitration (*1). Bus arbitration priority: DB7 (ID#7) > DB6 (ID#6) >... >DB0 (ID#0) >DB15 (ID#15) >DB14 (ID#14) >...
1.6.3 SELECTION phase An INIT selects a TARG (a single SCSI unit) in the SELECTION phase. Note: I/O signal is false during a SELECTION phase. (The I/O signal identifies the phase as SELECTION or RESELECTION). Start sequence without ARBITRATION phase In systems with the ARBITRATION phase not implemented, the INIT starts the SELECTION phase in the following sequence (see Figure 1.23).
Selection enabled parity protection and using/without using attention condition 1) The INIT sets the DATA BUS to a value that is the OR of INIT's SCSI ID bit, the TARG's SCSI ID bit, and the appropriate parity bit(s) (i.e., DB(P_CRCA and/or P1)). 2) In the case of selection using attention condition, the INIT should create an attention condition (indicating that a MESSAGE OUT phase is to follow the SLECTION phase).
Timeout procedure If the INIT cannot detect the response from TARG when the Selection Timeout Delay or longer has passed after starting the SELECTION phase, the timeout procedure shall be performed through one of the following schemes: a) The case of creating Reset condition The INIT should assert the RST signal.
1.6.4 RESELECTION phase The SCSI device operated as a TARG selects an INIT in the RESELECTION phase. This phase is an option for the system, and this phase can only be used in systems with the ARBITRATION phase implemented. When the TARG re-starts the command processing under the disconnection on the SCSI bus, the TARG reconnects with the INIT using this phase.
Response sequence If a SCSI unit (INIT to be selected) detects the SEL and I/O signals and data bus bit (DBn) corresponding to the own SCSI ID are all true and if it detects the BSY signal which is false for at least Bus Settle Delay, the SCSI unit shall recognize that it is selected in the RESELECTION phase.
Timeout procedure If the TARG cannot detect a response (BSY signal) from the INIT when the Selection Timeout Delay or longer has passed after starting the RESELECTION phase, the timeout procedure shall be performed though one of the following schemes: 1) The TARG asserts the TRUE signal and generates an RESET condition.
1.6.5 INFORMATION TRANSFER phases The COMMAND, DATA, STATUS and MESSAGE phases are generally called the INFORMATION TRANSFER phase. This phase can transfer the control information and data between the INIT and TARG via the data bus. The type of INFORMATION TRANSFER phase is determined by the combination of C/D, I/O, and MSG signals (see Table 1.1).
Notes: After the ACK signal becomes false in the current INFORMATION TRANSFER phase, the TARG can start preparing a new phase by changing the status of C/D, I/O and MSG signals. The status of these three signals can change in any order or at once. The status of one signal may change more than once;...
b. Transfer from INIT to TARG When the I/O signal is false, the information of the data bus is transferred from the INIT to the TARG. The following explains the information transfer sequence. The TARG asserts the REQ signal to request the INIT for information transfer. The INIT asserts the ACK signal at least one System Deskew Delay + Cable Skew Delay after sending valid information of the requested type on the data bus.
c. Improved Error Detection for the Asynchronous Information Phases (AIP) The COMMAND, MESSAGE and STATUS asynchronous information transfer phases except DATA phase only transfer information on the lower eight data bits of a SCSI bus with only normal parity protection on those transfers. In this improved detection additional check information can be transferred on the upper eight data bits.
Note: The IDD supports up to 20 MHz (40 MHz on LVD) of synchronous data transfer (see Table 1.7). The default data transfer mode is asynchronous. When the power is first turned on, the system is reset, or after the TARGET RESET message has been issued, data is transferred in the asynchronous mode only.
(b) The case of the I/O signal is false (transfer to the TARG) 1) The INIT detects a REQ assertion. 2) The INIT first drives the DB(7-0,P_CRCA) or DB(15-0,P_CRCA,P1) signals to their values. 3) The INIT delays at least one Transmit Setup Time. 4) The INIT asserts the ACK signal.
[Timing rule for TARG to INIT] Min. Transmit Assertion Period Min. Received Hold Time Min. Transmit Min. Transmit Setup Time Hold Time [Timing rule for INIT to TARG] Min. Transmit Assertion Period Min. Received Hold Time Min. Transmit Min. Transmit Setup Time Hold Time Figure 1.27 ST transfer in synchronous mode...
DT synchronous data transfer When a DT data transfer agreement has been established the target shall only use the DT DATA IN phase and DT DATA OUT phase for data transfers. The DT synchronous data transfer is available only when it has been defined between the INIT and TARG by exchanging the PARALLEL PROTOCOL REQUEST message with each other.
5) INIT fetches the values from DB(15-0) signals within a receive hold time of the transition of the REQ signal and it also fetches the value from the P_CRCA signal within a pCRC receive hold time of the transition of the REQ signal. Then INIT responds with an ACK transition.
9) TARG drives the DB(15-0) signals to their desired pCRC values and waits at least one transmit setup time. 10) TARG negates the REQ signal and holds the DB(15-0) signals for a minimum of one transmit hold time and the P_CRCA signal asserted for at least a pCRC transmit hold time. 11) TARG holds the REQ signal negated for at least one transmit REQ negation period with P_CRCA transitioning since the last REQ negation.
If received pCRC and computed pCRC do not match (i.e., a pCRC error is detected), or if an improperly formatted data group is transferred, then the INIT creates an attention condition or before the last transfer of the pCRC field. When the TARG switches to a MESSAGE OUT phase the INIT sends an INITIATOR DETECTED ERROR message to the TARG.
When the INIT detects an assertion of the P_CRCA signal and the REQ signal is negated (i.e., no pad field required), INIT transfers data bytes for all outstanding REQs received prior to the REQ that had the P_CRCA signal asserted. INIT drives the DB(15-0) signals to their desired pCRC values. INIT delays at least one transmit setup time, asserts the ACK signal and holds the DB(15- 0) signals valid for a minimum of one transmit hold time and the ACK signal asserted for a minimum of a transmit assertion period.
<Pad field required> transmit setup transmit hold transmit REQ assertion transmit REQ negation period with pCRCA period with pCRCA transmit negation transmit assertion transitioning transitioning period period + 100 mV - 100 mV DB15-0 data value pad value pCRC value pCRC value + 100 mV P_CRCA...
22.214.171.124 Wide mode transfer (16-bit SCSI) The wide mode transfer enables information transfer using a multiple-byte-wide data bus. It is used only in DATA phases. In wide mode transfer, the WIDE DATA TRANSFER REQUEST or PARALLEL PROTOCOL REQUEST message should first be exchanged by the INIT and the TARG to define the data transfer mode between SCSI devices.
DT DATA OUT phase The DT DATA OUT phase allows the target to request that data be sent from the initiator to the target using DT data transfers. The target shall assert the MSG signal and negate the C/D and I/O signals during the REQ/ACK handshake(s) of this phase.
Data transfer rate in synchronous mode Table 1.18 lists the synchronous transfer mode parameters valid for the IDD. The actual values are determined by exchange of SYNCHRONOUS DATA TRANSFER REQUEST or PARALLEL PROTOCOL REQUEST message between the two SCSI devices. If two or more INITs are used, different parameters may be used by each INIT.
Figure 1.30 Data transfer rate in synchronous mode 1.6.8 STATUS phase In a STATUS phase, the TARG requests to transfer status information from the TARG to the INIT. The TARG keeps the C/D and I/O signals true and the MSG signal false during REQ/ACK handshaking in this phase.
Note: The TARG can terminate the MESSAGE OUT phase even when the ATN signal is true when it returns a MESSAGE REJECT message to reject an illegal or invalid message, when it enters the BUS FREE phase as directed by the received message, or when it returns a message immediately in response to a received message (such as the SYNCHRONOUS DATA TRANSFER REQUEST).
f) The P_CRCA signal direction may switch direction while the DATA BUS and/or DB(P1) does not (e.g., changing from COMMAND phase to DT DATA OUT phase). When switching the P_CRCA signal direction from out (INIT driving) to in (TARG driving) 1) The TARG delays driving the P_CRCA by at least one Data Release Delay plus one Bus Settle Delay after negating the C/D signal 2) The INIT releases the P_CRCA signal within one Data Release Delay after the...
1.6.11 Time monitoring feature The IDD has a time monitoring feature for the SCSI bus to prevent the hang-up of the SCSI bus in the case that the IDD cannot receive a response from the INIT in the RESELECTION phase. The IDD monitors the response from the INIT (BSY signal) in the RESELECTION phase.
Bus Conditions Two types of asynchronous control, the ATTENTION condition and RESET condition, shall be defined to control or modify the bus phase transition sequence (bus conditions). 1.7.1 ATTENTION condition The ATTENTION condition allows the INIT to report that the INIT has a message to be sent to the TARG.
When the ATN signal becomes true in the DATA phase, the TARG shall start the MESSAGE OUT phase immediately after the DATA phase. However, the TARG can enter the MESSAGE OUT phase any time when necessary. (Data transfer is not interrupted on a boundary of logical data blocks.) The INIT shall continue the REQ/ACK handshaking (in DATA phase) until the bus phase is changed.
Min. System ATN transmit setup time. Deskew Delay 2 Figure 1.32 ATTENTION condition Note: The ATTENTION condition generated by the INIT determines the message level to be used in the command execution sequence. (Details are explained in Section 2.1.3.) If the ATTENTION condition is not generated, the TARG uses a TASK COMPLETE message only.
1.7.2 RESET condition The RESET condition allows all SCSI devices to release immediately from the bus. RESET has higher priority than any other phases and bus conditions. Any SCSI device can generate the RESET condition anytime by keeping the RST signal true for Reset Hold Time or more. The state of all bus signals except RST signals are undefined during the RESET condition.
Figure 1.33 RESET condition Bus Phase Sequence The SCSI bus phases are switched in the specific sequence depending on the command execution by the TARG. When the TARG asserts the BSY signal true in the SELECTION or RESELECTION phase, the status change of SCSI bus is controlled by the TARG except for the ATTENTION and RESET conditions.
SCAM The IDD does not support the SCAM functions. 1.9.1 SCAM operations The SCAM operation functions include all functions required for ID assignment of each SCAM device so that the SCAM tolerant and SCAM devices are identified by the SCAM initiator and target.
The dominant SCAM initiator can classify and assign SCSI IDs in various ways as described below. SCSI ID classification After the reset, the dominant SCAM initiator waits for a certain period to establish a delay time between the reset and selection of SCAM tolerant. The dominant SCAM initiator initializes the SCSI ID internal table and indicates that all SCSI IDs are not classified yet.
Level-1 SCAM target Figure 1.36 shows the operations of level-1 SCAM target. Its status names are explained later. The RESET condition can terminate all operations in any status, and it forces the SCAM target to the Reset Delay status. Power-on Reset Power-on Delay Reset Delay...
Note: The SCAM target may not recognize the Configuration Process Complete function code at the end of SCAM protocol, and may return to the SCAM Monitor status. The SCAM target in the ID Unassigned status is the one to which no SCSI ID has been assigned both explicitly and implicitly.
The SCAM target enters the Power-On Delay status immediately after the power-on, and allows the local initialization to start. The SCAM target shall exit this status, and enter the Initial SCAM Protocol status within a SCAM power-on to SCAM selection delay. During Initial SCAM Protocol status, the level-2 SCAM target arbitrates the SCSI bus without using the ID and performs the SCAM selection.
When two buses having the different width are interconnected, the DATA BUS signal of the bus having a larger width shall be terminated with an adapter. The connector has been designed to electrically isolate the A and P shielded connectors from each other. Two reserved lines (having A-cable contact numbers 23 and 24) and the open lines (having A- cable contact number 25) on the A cable are the TERMPWR lines (having the P-cable contact numbers 33, 34 and 35) on the P cable.
The ground offset voltage between logical ground terminals on any two device connectors shall be less than 50 mV. 1.10.3 Electrical characteristics of SCSI parallel interface The Fast-20 parallel interface shall have one of the following electrical characteristics: 1) Either conductor of single-ended driver and receiver, and each signal pair shall be active, and the other conductor shall be grounded.
Note: These requirements shall be satisfied if any device supplies the TERMPWR. b. Single-ended output signal characteristics An active negate driver shall be used for single-ended line signals. This driver can be in the Assert, Negate, or High-Impedance state. Each signal supplied by the SCSI device shall have the following output characteristics when measured at the connector position of SCSI device: (Low-level output voltage) = 0.0 to 0.5 VDC if I =48 mA (Signal assert state)
[mA] 3.24 Notes: This figure shows the operation areas allowed for DC output characteristics of active negate driver if negated. This figure does not show the AC output characteristics. The AC output characteristics may vary depending on the other requirements including the slew rate specifications.
SCSI driver 47 ±5% 2.5 V – Figure 1.39 Single-ended test circuit c. Single-ended signal input characteristics All SCSI units (including both the receivers and disable drivers) shall meet the following electrical signal characteristics during power-on: (Low-level input voltage) = 1.0 VDC Max (True signal) (High-level input voltage) = 1.9 VDC Min (False signal) (Low-level input current) = +/-20 A if V =0.5 VDC...
1.11 Low-Voltage Differential 1.11.1 Ultra2-SCSI The SPI-2, Fast-40 Standard defines the characteristics of cables, signals, and transceivers required for 40 MB/s signal transmission. The services required to communicate with a higher layer protocol is defined by the SPI-2. In addition, the expansion to SPI-2 parallel interface is defined to enhance the available data transfer rate.
LVD RECEIVER Figure 1.40 LVD transceiver architecture Balanced transmissions occur when the changes in +SIGNAL current and the changes in the – SIGNAL current precisely cancel each other. The balance is important to reduce EMI and common mode signals. Asymmetry occurs when the intensity of the source 2 and 4 assertion pair is different from the source 1 and 3 negation pair.
1.11.5 LVD capacitive loads There are three components to differential SCSI bus capacitive loading: –Signal to local ground (C1), +Signal to local ground (C2), and –signal to +signal (C3) as shown in Figure 1.42. The values C1, C2, and C3 represent measurements between the indicated points and do not represent discrete capacitors.
Table 1.20 Maximum capacitance Capacitance measurement Max. Notes @V=0.7 to 1.8 VDC -Signal/GND C1(pF) REQ, ACK and DB(15-0,P_CRCA,P1) @V=0.7 to 1.8 VDC -Signal/GND C2(pF) REQ, ACK and DB(15-0,P_CRCA,P1) @V=0.7 to 1.8 VDC -Signal/GND C3(pF) REQ, ACK and DB(15-0,P_CRCA,P1) @V=0.7 to 1.8 VDC -Signal/GND C1(pF) all other signals @V=0.7 to 1.8 VDC -Signal/GND...
Table 1.21 System level requirements Parameter Minimum Maximum (except OR-tied signals) (1) -1 V -100 mV (except OR-tied signals) (1) 100 mV (OR-tied signals) (1) -3.6 V -100 mV (OR-tied signals) (1) 100 mV 125 mV Attenuation (%) (2) Loaded media impedance (ohms) Unloaded media impedance (ohms) Terminator bias (mV) Terminator impedance (ohms)
Whenever a requirement for arbitration arises, a SCSI device shall first check to see if its fairness register is clear. If the fairness register is clear, this SCSI device may now participate in arbitration. If the fairness register is not clear, the SCSI device must put off arbitration until all lower priority SCSI IDs have been cleared from the fairness register.
CHAPTER 2 SCSI MESSAGE Message System SCSI Pointer Message Explanation This chapter describes SCSI messages and their operations for controlling the operation sequence of the SCSI bus. Note: The IDD operates as a target device (TARG) on the SCSI bus. The IDD is referred to as the TARG in this chapter except when its clear identification is required.
Table 2.2 Extended message Code Number Transfer Message (hex.) of bytes direction release SYNCHRONOUS DATA TRANSFER TARG INIT REQUEST WIDE DATA TRANSFER REQUEST TARG INIT PARALLEL PROTOCOL REQUEST TARG INIT 2.1.3 Message protocol Message implement requirements All SCSI devices shall implement at least the TASK COMPLETE message. If a logical unit number (LUN) for input and output operations is specified in the command (CDB), the minimum I/O operations required on the SCSI bus can be executed without using any message other than the TASK COMPLETE message.
Path establishment of I/O operation After the SELECTION phase, the IDENTIFY, ABORT TASK SET, or TARGET RESET message must first be sent from the INIT to the TARG. The IDENTIFY message can be followed by another message such as a SYNCHRONOUS DATA TRANSFER REQUEST message. If tagged queuing technique is used, the TASK SET message is issued immediately after the IDENTIFY message.
Pointer operation When the TARG issues a request message or executes reconnection, the INIT saves the pointer (that is, the INIT sets the current pointer value to the Saved pointer) or restores the pointer (that is, the INIT sets the Saved pointer value to the current pointer). Within the Saved pointer, the command pointer and status pointer always have their initial value of that command.
Message Explanation This section explains the function of each message. The following symbols are used for message identification. Symbols: (I T): The message which can be sent from the INIT to the TARG only. (T I): The message which can be sent from the TARG to the INIT only. T): The message which can be sent between the INIT and TARG in any direction.
The TARG continues command processing by itself, and reconnects the INIT when necessary (by reconnect processing) to continue command execution on the SCSI bus. This message cannot request the INIT for saving of the current data pointer. Note: To start disconnect processing during data transfer, the TARG must send the SAVE DATA POINTER message for saving of data pointer before sending this message.
TARGET RESET message: Clears all I/O operations of all INITs existing on all LUNs of the TARG. CLEAR TASK SET message: Clears all I/O operations of all INITs existing on a specific LUN. ABORT TASK SET message: Clears all I/O operations of a specific INIT existing on a specific LUN.
2.3.10 LINKED TASK COMPLETE message: X'0A'(T I) The LINKED TASK COMPLETE message indicates that the link command (with flag bit 0) has been executed normally and that the valid status byte has been posted to the INIT. When the INIT receives this message, it shall update both the current pointer and Saved pointer to the initial values of the next linked command.
2.3.14 CONTINUE TASK message: X'12' (I T) The CONTINUE TASK message is sent from the INIT to the TARG to reconnect to a task. This message shall be sent as one of the messages within the consecutive message out phases sent after the IDENTIFY message.
When the TARG is ready to transfer data for a disconnected task for which a TARGET TRANSFER DISABLE message has been sent, the TARG shall reconnect to the INIT for the task (via a reselection phase and consecutive message in phases containing an IDENTIFY message, and an optional SIMPLE message), send a DISCONNECT message, and, if the INIT does not respond with a MESSAGE REJECT message, generate a bus free phase.
HEAD OF QUEUE message: X'21'(I T) The HEAD OF QUEUE message specifies that the task be placed first in that logical unit's command queue. A subsequent task received with a HEAD OF QUEUE message is placed at the head of the command queue for execution in last-in, first-out order. ORDERED message: X'22'(I T) The ORDERED message specifies that the task be placed in that logical unit's command queue for execution in the order received.
2.3.18 IDENTIFY message: X'80' to X'FF' (I T) This message specifies the logical unit number (LUN) for the device (logical unit) under the TARG and establishes an I/O operation path between the INIT, TARG, and logical unit. a. Bit 6: Disconnect Privilege (D) Only the INIT can set this bit to 1.
2.3.19 SYNCHRONOUS DATA TRANSFER REQUEST message (I T) Byte X'01' X'03' X'01' REQ/ACK offset Transfer Period [4 m (ns)] The synchronous data transfer parameters are defined by exchange of the SYNCHRONOUS DATA TRANSFER REQUEST message between two SCSI devices. When an SCSI device having the synchronous transfer functions is first connected to another SCSI device after its power-on, a RESET condition (a hardware reset), or after reception of TARGET RESET message, these two devices exchange the SYNCHRONOUS DATA TRANSFER REQUEST message by each other and determine the synchronous data transfer.
When an SCSI device executes data transfer, it must not send REQ or ACK pulses exceeding the parameter limits which have been set by the two SCSI devices by exchange of the SYNCHRONOUS DATA TRANSFER REQUEST message. However, the SCSI device can transfer data using a larger Transfer Period or a smaller REQ/ACK Offset.
If the INIT sends the MESSAGE PARITY ERROR message or the INITIATOR DETECTED ERROR message against the TARG's SYNCHRONOUS DATA TRANSFER REQUEST message, the IDD recognizes that there was a parity error in the previous MESSAGE IN phase. Then, the IDD performs the error recovery procedure based on the SCSI Bus protocol for the erroneous phase up to 3 times.
Reception of the WIDE DATA TRANSFER REQUEST message Change in the transceiver mode (e.g., LVD mode to SE mode). The default data transfer mode between SCSI devices is asynchronous data transfer. asynchronous data transfer mode shall be selected when the power supply is turned on, a TARGET RESET message is received, a RESET condition occurs, or a WIDE DATA TRANSFER REQUEST message is received.
(b) Transfer mode establishment The default transfer mode is released, and the synchronous transfer mode or the asynchronous transfer mode is selected by the exchange of SYNCHRONOUS DATA TRANSFER REQUEST message. This mode is kept for each INIT individually and data transfer mode and synchronous mode parameters of each INIT differ each other.
Table 2.5 Transfer mode setup request from INIT to IDD (SDTR: SYNCHRONOUS DATA TRANSFER REQUEST message) Message from INIT IDD Response Transfer mode to be defined REQ/ACK X'00' SDTR Asynchronous mode Offset REQ/ACK Offset = 0 X'01' SDTR Synchronous mode REQ/ACK Offset REQ/ACK offset <...
d. Transfer mode setup from IDD to INIT When the synchronous data transfer mode is allowed by the CHANGE CONDITION command, the IDD shall execute one of the following operations if the INIT still continue the default transfer mode. When the ATTENTION condition has been generated: If an ATTENTION condition exists before the COMMAND phase and if the INIT does not send the SYNCHRONOUS DATA TRANSFER REQUEST message after the end of COMMAND phase, the IDD shall try to select the synchronous data transfer mode by sending...
Table 2.6 Transfer mode setup request from IDD to INIT (SDTR: SYNCHRONOUS DATA TRANSFER REQUEST message) Message from IDD Response from INIT Transfer mode to be defined SDTR MESSAGE REJECT Asynchronous mode REQ/ACK Offset = X'7F' REQ/ACK X'00' Asynchronous mode Offset X'01' Synchronous mode...
2.3.20 WIDE DATA TRANSFER REQUEST message (I T) Byte X’01’ X’02’ X’03’ m: Transfer Width Exponent Transfer width = 2 bytes Two SCSI devices exchange the WIDE DATA TRANSFER REQUEST message to determine the data bus width between them. When an SCSI device that supports the wide mode data transfer connects to other SCSI device just after power-on, after the RESET condition occurs, or after it receives the TARGET RESET message, it exchanges this message to determine the wide mode data transfer.
Table 2.7 Data bus width defined by message exchange Response message Data bus width WIDE DATA TRANSFER REQUEST Data is transferred using the responded data bus width. Transfer Width Exponent > 1 WIDE DATA TRANSFER REQUEST 8-bit data transfer Transfer Width Exponent = 0 MESSAGE REJECT message 8-bit data transfer Message exchange started by the INIT...
If the TARG enters the MESSAGE IN phase and first sends the MESSAGE REJECT message to the INIT immediately after the INIT has responded with the WIDE DATA TRANSFER REQUEST message, such message exchange is made invalid and the two SCSI devices shall set the 8-bit data bus width between them.
sequence ended in error, the transfer width between it and the INIT, and the synchronous mode will change to the default transfer mode. Note: When the INIT requests for a change of data bus width, the IDD responds to the request.
(b) Without ATTENTION condition If the ATTENTION condition does not exist, the IDD does not send the WIDE DATA TRANSFER REQUEST message to the INIT. In such case, the 8-bit bus width is set between the IDD and the INIT. Table 2.9 Wide mode setting request from the IDD to the INIT Message from TARG...
Table 2.10 TRANSFER PERIOD FACTOR field CODE DESCRIPTION X’00’-X’08’ Reserved Transfer period equals 12.5ns (note 2). This code is only valid if the X’09’ PROTOCOL OPTIONS field has a value selected that supports double- transition data transfers. X’0A’ Transfer period equals 25ns (note 3) X’0B’...
An information units enable request bit (IU_REQ) of zero indicates that information unit transfers shall not be used (i.e., data group transfers shall be enabled) when received from the originating SCSI device and that information unit transfers are not supported when received from the responding SCSI device.
A PARALLEL PROTOCOL REQUEST agreement applies to all logical units of the two SCSI devices that negotiated agreement. That is, if SCSI device A, acting as an INIT negotiates a data transfer agreement with SCSI device B (a TARG), then the same data transfer agreement applies to SCSI devices A and B even if SCSI device B changes to an INIT.
If the responding SCSI device is able to receive data successfully with these values (or smaller periods or larger REQ/ACK offsets or both), it returns the same values in its PARALLEL PROTOCOL REQUEST message. If it requires a larger period, a smaller REQ/ACK offset, or a smaller transfer width in order to receive data successfully, it substitutes values in its PARALLEL PROTOCOL REQUEST message as required, returning unchanged any value not required to be changed.
Target initiated PARALLEL PROTOCOL REQUEST negotiation If the TARG recognizes that PARALLEL PROTOCOL REQUEST negotiation is required, it not sends a PARALLEL PROTOCOL REQUEST message to the INIT. Initiator initiated PARALLEL PROTOCOL REQUEST negotiation If the INIT recognizes that PARALLEL PROTOCOL REQUEST negotiation is required, it creates an attention condition and sends a PARALLEL PROTOCOL REQUEST message to begin the negotiating process.
CHAPTER 3 ERROR RECOVERY Error Conditions and Retry Procedure Recovery Control This chapter describes the SCSI bus errors and their recovery by the IDD. Note: If a severe error has occurred, the IDD may switch the SCSI bus to the BUS FREE phase without sending the DISCONNECT or TASK COMPLETE message to the INIT.
COMMAND phase parity error When the IDD detects a parity error in the COMMAND phase, it retries the Command Phase up to 3 times. If the IDD fails to recover a parity error, it proceeds to the next procedure. If the LUN is already identified by the IDENTIFY message, the IDD terminates the command with the CHECK CONDITION status.
Rejected messages When the IDD receives a MESSAGE REJECT message from the INIT, the IDD executes one of the following depending on the rejected message type: a. TASK COMPLETE The IDD enters the BUS FREE phase immediately, and does not consider this as an error. b.
g. SAVE DATA POINTER When rejecting this message for disconnection of the SCSI bus, the IDD continues the currently executing command without disconnection as the DISCONNECT message is rejected. h. SIMPLE When this message sent next to the IDENTIFY message at reconnection is rejected, the IDD immediately enters the BUS FREE phase and terminates the command which has requested the reconnection abnormally.
Note: The retry count for the timeout of RESELECTION phase can be set by the CHANGE DEFINITION command. For details, see Section 1.6.11. Errors concerning message protocol If the IDD detects an ATTENTION condition in the SELECTION phase and it receives the message except for the following messages from the INIT in its response to the ATTENTION condition (the MESSAGE OUT phase), the IDD considers it as an error in the message protocol and enters the BUS FREE phase immediately.
Recovery Control The IDD performs the error recovery for some kinds of SCSI bus errors (see Section 3.1). All recovery procedures are based on the protocol of SCSI bus phase. Note: If the INIT does not generate an ATTENTION condition, the IDD does not use any message except for the TASK COMPLETE message.
Table 3.1 Retry procedure for SCSI error Termination procedure Error Condition Status Sense data CHECK ABORTED COMMAND Parity error in MESSAGE OUT phase NO SENSE BUS FREE CHECK ABORTED COMMAND Parity error in COMMAND phase NO SENSE BUS FREE Parity error in DATA OUT phase CHECK ABORTED COMMAND INITIATOR DETECTED ERROR...
Glossary Bus condition: Asynchronous operation condition used for status transition of SCSI bus. There are two types of bus conditions: ATTENTION and RESET conditions. Bus phase: The name of SCSI bus state. The SCSI bus can be either in the BUS FREE, ARBITRATION, SELECTION, RESELECTION or INFORMATION TRANSFER phase.
Sense key: Four-bit code attached to sense data to identify the class of the detected error. Status: One byte of information that is transferred from a target to an initiator on termination of each command to indicate the command termination status. Target: SCSI device which performs I/O initiated by an initiator.
Abbreviation MeSeaGe ACKnowledge ATenTion American Wire Gauge Original Equipment Manufacturer BuSY Parallel Protocol Request Control/Data REQuest Common Command Set ReSeT Command Descriptor Block SCSI Small Computer System Interface Data Bus SDTR Synchronous Data Transfer Request Data Bus Parity Single-Ended Direct Current SELect Double Transfer Single Transfer...
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