Fluke 43B Service Manual page 51

variations, a temperature dependent resistor is mounted in the LCD unit. It is connected
to the LCDTEMP1 line. The resistance change, which represents the LCD temperature,
is measured by the D-ASIC via the S-ADC on the POWER part.
The back light lamp is located at the left side of the LCD, so this side becomes warmer
than the right side. As a result the contrast changes from left to right. To eliminate this
unwanted effect, the CONTRAST control voltage is increased during building up a
screen image. A FRAME pulse starts the new screen image. The FRAME pulse is also
used to discharge C404. After the FRAME pulse, the voltage on C404 increases during
building up a screen image.
Keyboard Control, ON/OFF Control
The keys are arranged in a 6 rows x 6 columns matrix. If a key is pressed, the D-ASIC
drives the rows, and senses the columns. The ON/OFF key is not included in the matrix.
This key toggles a flip-flop in the D-ASIC via the ONKEY line (D-ASIC pin 72). As the
D-ASIC is permanently powered, the flip-flop can signal the test tool on/off status.
PWM Signals
The D-ASIC generates various pulse signals, by switching a reference voltage
(REFPWM1 or REFPWM2), with software controllable duty cycle (PWMA, PWMB
pins 26-40). By filtering the pulses in low pass filters (RC), software controlled DC
voltages are generated. The voltages are used for various control purposes, as shown in
Table 3-6.
PWM signal Function
HO-RNDM HOLDOFF randomize control
TRGLEV1D, Trigger level control
TRIGLEV2D
POS-AD, POS-BD Input 1,B position control
OFFSETAD, Input 1,B offset control
OFFSETBD
BACKBRIG Back light brightness control
CONTR-D Display contrast control
SADCLEVD S ADC comparator voltage
CHARCURD Battery charge current control
SDA-SCL Serial Bus
The unidirectional SDA-SCL serial bus (pin 56, 57) is used to send control data to the C-
ASIC's (e.g. change attenuation factor), and the T-ASIC (e.g. select other trigger source).
The SDA line transmits the data bursts, the SCL line transmits the synchronization clock
(1.25 MHz).
Probe Detection
Via the probe detection inputs PROBE-A and PROBE-B (pin 54, 55), the D-ASIC
detects if the Input 1 and 2 probes have been connected/disconnected. The SUPPRDET
signal (pin 99) can suppress the probe detection. If this signal is low, The PROBE-A and
PROBE-B lines are permanently low (via R471, R472), regardless of a probe is
connected or not connected. This function is used in all appropriate modes except the
SCOPE mode.
TXD, RXD Serial Interface (Optical Port)
Table 3-6. D-ASIC PWM Signals
Destination
R487 of RANDOMIZE circuit
T-ASIC
C-ASIC
C-ASIC
Back light converter (POWER part)
LCD unit
SLOW ADC (POWER part)
P-ASIC
Circuit Descriptions
3.3 Detailed Circuit Descriptions
Reference
REFPWM1
REFPWM1
REFPWM1
REFPWM1
REFPWM1
REFPWM1
REFPWM2
REFPWM2
3
3-27