Bclk[1:0] Specifications; Front Side Bus Differential Bclk Specifications - Intel HH80552PG0962M - Pentium 4 3.4 GHz Processor Datasheet

2.7.4

BCLK[1:0] Specifications

Table 19.

Front Side Bus Differential BCLK Specifications

Symbol
V Input Low Voltage
L
V Input High Voltage
H
V Absolute Crossing Point
CROSS(abs)
V Relative Crossing Point
CROSS(rel)
Range of Crossing
∆V
CROSS
Points
V Overshoot
OS
V Undershoot
US
V Ringback Margin
RBM
V Threshold Region
TM
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. Crossing voltage is defined as the instantaneous voltage value when the rising edge of BCLK0 equals the falling edge
of BCLK1.
3. The crossing point must meet the absolute and relative crossing point specifications simultaneously.
4. V is the statistical average of the V
Havg
5. V can be measured directly using "Vtop" on Agilent* oscilloscopes and "High" on Tektronix* oscilloscopes.
Havg
6. Overshoot is defined as the absolute value of the maximum voltage.
7. Undershoot is defined as the absolute value of the minimum voltage.
8. Ringback Margin is defined as the absolute voltage difference between the maximum Rising Edge Ringback and the
maximum Falling Edge Ringback.
9. Threshold Region is defined as a region entered around the crossing point voltage in which the differential receiver
switches. It includes input threshold hysteresis.
32
Parameter
0.250 +
0.5(V
Havg
V
CROSS
measured by the oscilloscope.
H
Min Typ
-0.150 0.000
0.660 0.700
0.250 N/A
N/A
– 0.700) 0.5(V
N/A N/A
N/A N/A
-0.300 N/A
0.200 N/A
– 0.100 N/A V
CROSS
§ §
Electrical Specifications
Max Unit Notes
N/A V
0.850 V
2, 3
0.550 V
0.550 +
3, 4, 5
V
– 0.700)
Havg
0.140 V
V + 0.3 V
H
N/A V
N/A V
+ 0.100 V
Datasheet
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