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Automation Command
xtrlogfile <filename.log>
status
1 simnow> xtrsvc.usage
Automation Command
xtrenable <0|1>
xtrfile <filename.xml>
XTRMemBits n
Xtrstatus
A.7.29 ATI SB400/SB600/SB700
1 simnow> sb600.usage
Automation Command
HtInterrupts (0|1)
HtIntStatus
IoLog (0|1)
IoLogStatus
MemLog (0|1)
MemLogStatus
SmiSciLog (0|1)
SmiSciLogStatus
Version
SetPciIrqMap {BasePciIrq(0-3)}
{ChipPciIrq(0-7)}
GetPciIrqMap {BasePciIrq(0-3)}
GetPciIrqTotal
A.7.30 ATI RS480
1 simnow> rs780.usage
252
AMD Confidential
Sets name of the log file where XTR
messages should be logged. This is
optional and if not used the log is directed
to the simulators log.
Displays the status of XTR playback
Enables (1) or Disables (0) XTR Record.
All other values are invalid.
Sets the XTR-XML file for XTR Record.
Sets number of bits for memory address
bits to scan. n= 16, 32 or 48. Default is 32.
Displays the status of XTR Record.
Description
Enables (1) or disables (0) HyperTransport interrupts.
Returns „enabled‟ if HyperTransport interrupts are
enabled; otherwise it returns „disabled‟.
Enables (1) or disables (0) IO logging.
Returns „enabled‟ if IO Logging is enabled; otherwise it
returns „disabled‟.
Enables (1) or disables (0) IO logging.
Returns „enabled‟ if Memory Logging is enabled;
otherwise it returns „disabled‟.
Enables (1) or disables (0) IO logging.
Returns „enabled‟ if SMI SCI Logging is enabled;
otherwise it returns „disabled‟.
Displays the binary revision of the RD790 model.
Depending on platform configuration, it maps base
PCIIRQ#A/B/C/D (0-3) from PCI bridge to ATI chip
internal PCIIRQ#A/B/C/D/E/F/G/H (0-7).
Returns
the
PCIIRQ#A/B/C/D/E/F/G/H (0-7) which the specific
base PCIIRQ#A/B/C/D(0-3) is mapped to.
Returns the total number of chip internal PCIIRQs.
September 12
Description
Description
ATI
chip
internal
Appendix A
h
, 2008
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