Opcode Syntax - AMD SimNow Simulator 4.4.4 User Manual

User Manual
 reg/mem64 – Quadword (64-bit) operand in a GPR register or memory.
 rel8off – Relative address in the current code segment, in 8-bit offset range.
 rel16off - Relative address in the current code segment, in 16-bit offset range.
 rel32off - Relative address in the current code segment, in 32-bit offset range.
 segReg or sReg – Word (16-bit) operand in a segment register.
 ST(0) – x87 stack register 0.
 ST(i) – x87 stack register i, where i is between 0 and 7.
 xmm – Double quadword (128-bit) operand in an XMM register.
 xmm1 – Double quadword (128-bit) operand in an XMM register, specified as the
left-most (first) operand in the instruction syntax..
 xmm2 – Double quadword (128-bit) operand in an XMM register, specified as the
right-most (second) operand in the instruction syntax.
 xmm/mem64 – Quadword (64-bit) operand in a 128-bit XMM register or memory.
 xmm/mem128 – Double quadword (128-bit) operand in a 128-bit operand in an
XMM register or memory.
 xmm1/mem128 – Double quadword (128-bit) operand in a 128-bit operand in an
XMM register or memory, specified as the left-most (first) operand in the
instruction syntax..
 xmm2/mem128 – Double quadword (128-bit) operand in a 128-bit operand in an
XMM register or memory, specified as the right-most (second) operand in the
instruction syntax.
A.6.1.2 Opcode Syntax
In addition to the notation shown in above in "Mnemonic Syntax" on page 192, the
following notation indicates the size and type of operands in the syntax of instruction
syntax.
 /digit – Indicates that the ModRM byte specifies only one register or memory
(r/m) operand. The digit is specified by the ModRM reg field and is used as an
instruction-opcode extension. Valid digit values range from 0 to 7.
 /r – Indicates that the ModRM byte specifies both a register and operand and a
reg/mem (register or memory) operand.
 cb, cw, cd ,cp – Specified a code-offset value and possibly a new code-segment
register value. The value following the opcode is either one byte (cb), two bytes
(cw), four bytes (cd), or six bytes (cp).

ib, iw, id – Specifies an immediate-operand value. The opcode determines
whether the value is signed or unsigned. The value following the opcode,
ModRM, or SIB byte is either one byte (ib), two bytes (iw), or four bytes (id).
Word and doubleword values start wit the low-order byte.
 +rb, +rw, +rd, +rq – Specifies a register value that is added to the hexadecimal
byte on the left, forming a one-byte opcode. The result is an instruction that
operates on the register specified by the register code. Valid register-code values
are shown in "AMD x86-64 Architecture: Programmer‟s Manual, Volume 3".
 m64 – Specifies a quadword (64-bit) operand in memory.
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Appendix A