NEC PowerMate Enterprise Manual page 26

Table 1-2 System Board Feature Components
Chip
82555 10/100 bit physical layer
interface
Remote wake up controller
National Heceta LM79
FDC37C667 Ultra I/O controller
Yamaha OPL3-SA3
Technical Information
Function
The Intel 8255 physical layer interface (PHY)
provides the following features:
Integrated 10/100 Mbit per second single
chip solution
Complete 10/100 Mbit per second media
independent interface compliance with MII
support
Full duplex operation available in both 10
and 100 Mbit per second modes
25 MHz clock for 10 and 100 Mbit per
second modes
Single magnetics for 10 and 100 Mbit per
second operation
IEEE 802.3 Auto-Negotiation support for
10Base-T, 10Base-T FDX, 100Base-TX
FDX, 100Base-TX FDX-FC, and
100Base-T4 configurations
Parallel detection algorithm for legacy
support of non-Auto-Negotiation enabled
link partner
Glueless interface to T4-PHY for combo
T4/TX solution with single magnetics.
The Remote Wake Up controller device
performs the Wake On LAN functions of the
system board through the on-board LAN
subsystem. When the computer is turned off,
the Remote Wake Up controller and the
82555 PHY remain powered by a 5V standby
voltage. The device monitors network traffic
at the MII interface, and when it detects a
network packet, it sends a wake up signal
that powers up the computer.
Provides voltage, temperature, and security
monitoring (NEC MagicEye technology).
Multimode parallel port:
Centronics compatible (standard mode)
Enhanced capabilities port (ECP)
Enhanced parallel port (EPP)
Two RS-232C serial ports
Integrated 8042A keyboard controller
Supports industry-standard floppy controller
Audio on system board
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