Pci Interrupt Routing Map - Intel BLKD865PERL Technical Product Specification

Intel Desktop Board D865PERL Technical Product Specification
Table 18.

PCI Interrupt Routing Map

PCI Interrupt Source
AGP connector
ICH5 USB UHCI controller 1 INTA
SMBus controller
ICH5 USB UHCI controller 2
AC '97 ICH5 Audio
ICH5 LAN
ICH5 USB UHCI controller 3
ICH5 USB UHCI controller 4 INTA
ICH5 USB 2.0 EHCI controller
PCI bus connector 1
PCI bus connector 2
PCI bus connector 3
PCI bus connector 4
PCI bus connector 5
Serial ATA/Serial ATA RAID
IEEE-1394a-2000
✏
NOTE
In PIC mode, the ICH5 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 17 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
58
ICH5 PIRQ Signal Name
PIRQA PIRQB PIRQC
INTA INTB
INTB
INTB
INTC
INTD INTA INTB
INTB
INTC INTA
INTA
PIRQD PIRQE PIRQF
INTB
INTA
INTD INTA
INTC INTB
INTC
INTA INTC
INTD
INTA
PIRQG PIRQH
INTD
INTB INTC
INTA INTD
INTD
INTB