Table 12 Typical Port 80H Post Sequence - Intel 945G - Bulk Single Unit Atx Exp User Manual

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Intel 945G Express Chipset Development Kit User's Manual
Setting Up the Development Kit
POST Code
DXE Drivers
E7
E8
E9
EA
EB
EE
EF
Runtime Phase / EFI OS Boot
F4
F5
F8
F9
FA
PEIMs / Recovery
30
31
34
35
3F
Table 12 Typical Port 80h POST Sequence
POST
21
22
23
25
28
34
E4
12
13
50
51
92
90
94
95
36
Waiting for user input.
Checking password.
Entering BIOS setup.
TBD – Flash Update.
Calling Legacy Option ROMs.
TBD – Calling INT 19. One beep unless silent boot is enabled.
TBD – Unrecoverable boot failure/S3 resume failure.
Entering Sleep state.
Exiting Sleep state.
EFI boot service ExitBootServices ( ) has been called.
EFI runtime service SetVirtualAddressMap ( ) has been called.
EFI runtime service ResetSystem ( ) has been called.
Crisis Recovery has initiated per user request.
Crisis Recovery has initiated by software (corrupt flash).
Loading recovery capsule.
Handing off control to the recovery capsule.
Unable to recover.
Code Description
Initializing a chipset component.
Reading SPD from memory DIMMs.
Detecting presence of memory DIMMs.
Configuring memory.
Testing memory.
Loading recovery capsule.
Entered DXE phase.
Starting Application processor initialization.
SMM initialization.
Enumerating PCI buses.
Allocating resourced to PCI bus.
Detecting the presence of the keyboard.
Resetting keyboard.
Clearing keyboard input buffer.
Keyboard self-test.
Description of POST Operation
Reference #308823