Tektronix 5441 Instruction Manual page 52

Theory of Operation-5441lR5441
Time-Slot
\
R o w 1 1
1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 1 1 0 ,
R -4
! !
R R -5 -6
R-7
R -8
R -9
R-10
(A)
Program for 100 p V , inverted, calibrated (uncalibrated operation
shown by shaded area)
1260-41
Fig. 3-9. Idealized current waveforms of (A) Row analog data,
(8) Column analog data.
only one instruction can be encoded during a time-slot, the
zeros do not appear in the display. The crt readout now
changes to 1 mV.
Likewise, if a 100X readout-coded probe is connected to
the input of the plug-in unit, the column current during time-
slot 1 is increased two units for a total of four units of col-
umn current. This addresses an instruction in the character
selection matrix, which reduces the prefix and adds one
zero to the display. The resultant crt readout with the previ-
ous program is 10 mV.
Two other lines of information are connected from each
plug-in compartment to the readout system. The column
and row analog data from channel 2 of a dual-channel plug-
in are connected to the readout system through contacts
A24 and 824 of the plug-in interface, respectively.
Column and Row Data Switches
The readout data from the plug-in units is connected to
the column and row data switch stages. A column-data line
and a row-data line convey analog data from each of the
eight data sources (two channels from each of the three
plug-in compartments and two external channels, Option
03).
The column data switch, U1040, and the row data
switch, U1030, receive the word address code from the
word counter. This binary code directs the column data
switch and the row data switch as to which channel should
be the source of the readout data. Table 3-1 gives the eight
combinations of the word address code, and the resultant
channel is selected with each combination. These stages
have eight inputs and provide a single time-multiplexed out-
put at pin 7, which includes the information from all of the
input channels. Six of the eight inputs to each stage origi-
nate in the plug-in units; the seventh and eighth inputs come
from an optional external access jack.
Table 3-1
WORD ADDRESS CODE
Display-Skip Generator
The display-skip generator, Q1040-(21048-Q1050-
(21052, monitors the time-multiplexed column data at the
output of the column data switch during each time-slot, to
determine if the information at this point is valid data that
should result in a crt display. The voltage at the base of
Q1040B is set by divider CR1040-CR1041 -R1046-R1047-
R1048. Quiescently, there is approximately 100 pA of cur-
rent flowing through R1040 from (21056 and the zeros logic
and memory stage (purpose of this quiescent current will be
discussed in connection with the zeros logic and memory
stage). This current biases Q1040A so that its base is ap-
proximately 0.2 V more positive than the base of Q1040B in
the absence of column data. Therefore, since Q1040A and
3-16
REV MAY 1982