ST STM32U3 Application Note page 4

• V , V
REF-
V is the input reference voltage for ADCs and DACs. It is also the output of the internal voltage
REF+
reference buffer (VREFBUF) when enabled. The VREF+ pin can be grounded when ADC and DAC are not
active.
The internal voltage reference buffer supports four output voltages that are configured with the VRS[2:0]
field in VREFBUF_CSR register:
– V
– V
– V
– V
VREF- and VREF+ pins are not available on all packages. When not available, they are bonded to VSSA
and VDDA pins, respectively.
When the VREF+ pin is double-bonded to VDDA in a package, the internal VREFBUF is not available, and
must be kept disabled.
V must always be equal to V
REF-
The following figures present an overview of the STM32U3 devices power supply, depending on the SMPS
presence.
Figure 1.
AN6011 - Rev 1
REF+
around 1.5 V. This requires V
REF+
around 1.8 V. This requires V
REF+
around 2.048 V. This requires V
REF+
around 2.5 V. This requires V
REF+
SSA
STM32U375xx and STM32U385xx power supply overview (without SMPS)
V
DDA
A/D converters
VDDA
D/A converters
VSSA
Operational amplifiers
Voltage reference buffer
USB transceiver
VSS
V
V
DDIO2
VDDIO2
VSS
V domain
DD
V
DDIO1
I/O ring
Reset block
Internal RC oscillators
VSS
Standby circuitry
(Wake-up logic, IWDG)
VDD
LDO regulator
Low-voltage detector
V
SW
VBAT LSE crystal 32 kHz oscillator
LSI 32 kHz oscillator
Backup registers
RCC_BDCR and PWR_BDCR registers
RTC
TAMP
≥ 1.8 V.
DDA
≥ 2.1 V.
DDA
≥ 2.4 V.
DDA
≥ 2.8 V.
DDA
.
domain
Comparators
domain
DDIO2
I/O ring
PG[15:2]
V domain
CORE
Core
SRAM1
SRAM2
V
Digital
CORE
peripherals
Flash memory
Backup domain
AN6011
Power supply management
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