ST STM32U3 Application Note page 32

9.4.2 Octal serial peripheral interface (OCTOSPI)
Interface connectivity
The OCTOSPI is a specialized communication interface targeting single, dual , quad or octo-SPI flash memories.
The OCTOSPI interface is a serial data bus interface, that consists of a clock (CLK), a chip select signal (nCS),
clock to support 1.8V HyperBus protocol (nCLK), line for data strobe/write mask signals to/from the memory
(DQS), and eight data lines (IO[0:7]).
Interface signal layout guidelines
• Reference the plane using GND or PWR (if PWR, add 10 nF stitching cap between PWR and GND
• Trace the impedance: 50 Ω ± 10%
• The maximum trace length should be below 120 mm. If the signal trace exceeds this trace-length/speed
criterion, then a termination should be used
• Avoid using multiple signal layers for the data signal routing.
• Route the clock signal at least 3x of the trace away from other signals. Use as less vias as possible to
avoid the impedance change and reflection. Avoid using a serpentine routing.
• Match the trace lengths for the data group within ± 10 mm of each other to diminish skew. Serpentine
traces (back and forth traces in an "S" pattern to increase trace length) can be used to match the lengths.
• Avoid using a serpentine routing for the clock signal and as less via(s) as possible for the whole path. A via
alters the impedance and adds a reflection to the signal.
9.4.3 Embedded trace macrocell (ETM)
Interface connectivity
The ETM enables the reconstruction of the program execution. The data are traced using the data watchpoint and
trace (DWT) component or the instruction trace macrocell (ITM) whereas instructions are traced using the
embedded trace macrocell (ETM). The ETM interface is synchronous with the data bus of four lines D[0:3] and
the clock signal CLK.
Interface signals layout guidelines
• Reference the plane using GND or PWR (if PWR, add 10 nF stitching cap between PWR and GND
• Trace the impedance: 50 Ω ± 10%
• All the data trace should be as short as possible (<=25 mm),
• Trace the lines which should run on the same layer with a solid ground plane underneath it without a via.
• Trace the clock which should have only point-to-point connection. Any stubs should be avoided.
• It is strongly recommended also for other (data) lines to be point-to-point only. If any stubs are needed, they
should be as short as possible. If longer are required, there should be a possibility to optionally disconnect
them (for example, by jumpers).
AN6011 - Rev 1
AN6011
Recommended PCB routing guidelines
page 32/38