ST STM32U3 Application Note page 21

6 Debug management
The serial wire/JTAG debug port (SWJ-DP) is an Arm
The host/target interface is the hardware equipment that connects the host to the application board. This interface
is made of three components: a hardware debug tool, a serial-wire connector, and a cable connecting the host to
the debug tool.
The figure below shows the connection of the host to a development board.
The Nucleo demonstration board embeds the debug tools (STLINK), so it can be directly connected to the PC
with a USB cable.
6.1 SWJ-DP (serial-wire and JTAG debug port)
The SWJ-DP combines:
• a JTAG‑DP that provides a 5-pin standard JTAG interface to the AHP-AP port
• an SW-DP that provides a 2-pin (clock + data) interface to the AHP-AP port
In the SWJ-DP, the two JTAG pins of the SW-DP are multiplexed with some of the five JTAG pins of the JTAG-DP.
Caution: The I/O pins used by SWJ-DP can be reconfigured to other functions by the firmware, but in that case the
debugging is no longer possible and the connection is lost.
6.2 Pinout and debug port pins
The devices are offered in various packages with different numbers of available pins. As a result, some
functionality related to the pin availability may differ from one package to another.
6.2.1 SWJ-DP pins
Five pins are used as outputs for the SWJ-DP, as alternate functions of the GPIOs (general-purpose I/Os). These
pins, detailed in the table below, are available on all packages.
SWJ-DP pin
JTMS/SWDIO
JTCK/SWCLK
JTDI
JTDO/TRACESWO Output JTAG test data output
JNTRST
AN6011 - Rev 1
Figure 8. Host-to-board connection
Debug tool
Host PC
STM32 board
Table 6. Debug port pin assignment
JTAG debug port
Type Description
Input JTAG test mode selection Input/Output Serial‑wire data input/output
Input JTAG test clock
Input JTAG test data input
Input JTAG test nReset
® ™
standard CoreSight debug port.
JTAG/serial-wire connector
Power supply
SW debug port
Type Debug assignment
Input Serial‑wire clock
- -
TRACESWO if asynchronous trace
-
is enabled
- -
AN6011
Debug management
Pin assignment
PA13
PA14
PA15
PB3
PB4
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