Switching Performance; Mosfet Switch-On Behavior - Infineon EVALFFXMR20KM1HDRTOBO1 Getting Started Manual

p u b l i c
EVAL-FFXMR20KM1HDR
Evaluation board description and getting started guide
System performance
4.2

Switching performance

This chapter presents some examples of extracted waveforms of the module FF6MR20KM1H, which has been
characterized with the help of the evaluation board.
One key aspect in designing half-bridge topologies with SiC MOSFET devices is to investigate the parasitic turn-
on of the upper switch during switching of the lower switch, and vice versa. This effect may be caused by a high
dv/dt of a SiC MOSFET, which can exceed 50 kV/µs for a CoolSiC™ MOSFET.
To mitigate the situtation, two approaches have been considered here.
As a first approach, different gate source voltages (V
device. In the case of unipolar switching, the dv/dt can be reduced by using larger gate resistance to mitigate
the parasitic turn-on events. This is a significant advantage demonstrating the simple gate controllability of
CoolSiC™ MOSFET devices.
4.2.1

MOSFET switch-on behavior

The negative output voltage of the board was adjusted from -3 V to 0 V as shown in the upper graph of Figure
17.
The overall switching behavior id independent of the negative gate-source voltage (V
Turn-on waveforms with different gate source voltages (V
Figure 17
User guide
= -5...0 V / +15...18 V) are used to drive the gate of the
GS
GS
20 of 24
).
GS
= -3 ... 0 V / +18 V)
Revision 1.0
2023-03-27