Simplified Block Diagram; Decoupling Requirements - Analog Devices Linear ADI Power LTM4681 Manual

LTM4681

SIMPLIFIED BLOCK DIAGRAM

R
V SENSE
IN
+
C C
IN1 IN2
+
IN_01 ,
+
IN_23
+
A = N
SW0, SW2
V , V ADJ
OUT0 OUT2
TO 3.3V
UP TO 31.25A
V
OUT0
C
OUT2
C
GND
OUT1
TSNS0
TSNS0, TSNS2
+
V , V
OSNS0 OSNS2
REMOTE SENSE
LOAD C
LOAD
–
V , V
OSNS0 OSNS2
COMP0b, COMP2b
C
COMPH
COMP0a, COMP2a
C
COMPL
PGOOD0, PGOOD2
TWO DIFFERENT PSM
CONTROLLERS
1ST CONTROLLER
(PAGE 0X00) = CHANNEL 0
(PAGE 0X01) = CHANNEL 1
SCL_01, SCL_23
2ND CONTROLLER
(PAGE 0X00) = CHANNEL 2
SDA_01, SDA_23
(PAGE 0X01) = CHANNEL 3
ALERT_01, ALERT_23
5.5V-TOLERANT
WP_01, WP_23
PULL-UP NOT
SHOWN
RUN0, RUN1
RUN2, RUN3
FAULT0, FAULT1
3.3V-TOLERANT
FAULT2, FAULT3
PULL-UP NOT
SHARE_CLK_01, SHARE_CLK_23
SHOWN

DECOUPLING REQUIREMENTS

SYMBOL PARAMETER
C External High Frequency Input Capacitor Requirement
INH
(5.75V ≤ V ≤ 16V, V
IN
C External High Frequency Output Capacitor Requirement
OUTn
(5.75V ≤ V ≤ 16V, V
IN
24
1
1µF
–
SV ,
IN_01 , V ,
IN_01
IN01
–
IN_23 SV V
IN_23 IN23
–
0.22µF 0.1µF
INPUT CURRENT/ICHIP (READ_IIN,
MFR_READ_IIN_PEAK TO ANALOG
READBACK)
MT
290nH
2.2µF
MB
0.01µF
I CURRENT SENSE
OUT
+
X1
–
PROG GM
+
–
EA0,2
22pF
PROG R
COMP
POWER CONTROL DIGITAL SECTION
ROM
RAM
Figure 2. Simplified LTM4681 Block Diagram of the 1/2 Function
Commanded to 1.000V)
OUTn
Commanded to 1.000V)
OUTn
For more information
22µF
4.7µF
INTV , V V , V
CC_01 BIAS DD33_01
INTV V V
CC_23 DD33_23
2.2µF
MT
POWER CONTROL
ANALOG SECTION
MB
DIE TEMP SENSE
TO ANALOG TO ANALOG
I CURRENT SENSE
OUT
READBACK READBACK
TEMP MUX
ALL ANALOG
READBACK SIGNALS
+
10:1 MUX
–
EA1,3
PROG R
ADC
SPI SLAVE
SPI MASTER
SYNC DRIVER
DIGITAL ENGINE
32MHz OSC
EEPROM
T = 25°C. Using Figure 2 configuration.
A
CONDITIONS
I = 31.25A
OUT0
I = 31.25A
OUT1
I = 31.25A
OUT0
I = 31.25A
OUT1
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ALL PINS SHOWN IS FUNCTION ×2
TO SUPPORT CHANNELS 0 AND 1,
AND CHANNELS 2 AND 3.
,
IN01
IN23
0.22µF
V
V
IN_VBIAS
BIAS
5.5V
RUNP
SW1, SW3
290nH
V
OUT1
2.2µF
GND
SGND_01, SGND_23
0.01µF
TSNS1
TSNS1, TSNS3
+ +
V , V
OSNS1 OSNS3
+
REMOTE SENSE
X1
– –
V , V
OSNS1 OSNS3
–
PROG GM
COMP1b, COMP3b
22pF
COMP
COMP1a, COMP3a
PGOOD1, PGOOD3
SYNC_01, SYNC_23
V , V
DD25_01 DD25_23
2.5V
2.2µF
14.3k
EACH PIN
ASEL_01, ASEL_23
FSWPH_01_CFG, FSWPH_23_CFG
VTRIM0_CFG
VTRIM1_CFG
VTRIM2_CFG, VTRIM3_CFG
VOUT0_CFG
VOUT1_CFG
VOUT2_CFG, VOUT3_CFG
4681 F02
MIN TYP
100
100
800
800
Channel # GUI
Identity
0 U0:A0
1 U0:A1
2 U0:B0
3 U0:B1
V
IN
V , V ADJ
OUT1 OUT3
TO 3.3V
UP TO 31.25A
C
C
OUT3
OUT4
C LOAD
LOAD
C
COMPH
C
COMPL
3.3V
TOLERANT PULL-UP
NOT SHOWN
EXTERNAL RESISTIVE
DIVIDERS BETWEEN
V AND
_
DD25 nn
SGND_ ARE
nn
NOT SHOWN.
REFER TO
TABLES 1, 2 AND 3.
MAX UNITS
µF
µF
µF
µF
Rev. A