Analog Devices Linear ADI Power LTM4681 Manual page 19

PIN FUNCTIONS
V (C8): Internally Generated 2.5V Power Supply
DD25_01
Output Pin for Channel 0 and 1 Circuits. Do not load this
pin with external current; it is used strictly to bias internal
logic and provides current for the internal pull-up resis-
tors connected to the configuration-programming pins.
No external decoupling is required.
V (AB11): Internally Generated 2.5V Power Supply
DD25_23
Output Pin for Channel 2 and 3 Circuits. Do not load this
pin with external current; it is used strictly to bias internal
logic and provides current for the internal pull-up resis-
tors connected to the configuration-programming pins.
No external decoupling is required.
ASEL_01 (B9): Serial Bus Address Configuration Pin for
Channel 0 and 1 Controller. On any given I
bus segment, every device must have its own unique slave
address. If this pin is left open, the LTM4681 powers up
to its default slave address of 0x4E (hexadecimal), i.e.,
1001110b (industry-standard convention is used through-
out this document: 7-bit slave addressing). The lower four
bits of the LTM4681's slave address can be altered from
this default value by connecting a resistor from this pin to
SGND. Minimize capacitance—especially when the pin is
left open—to assure accurate detection of the pin state.
It is recommended to use a resistor to set the address.
The ASEL_01 address will be used to address channels
0 and 1, and a different ASEL_23 address will be used
to address channels 2 and 3. For addressed ASEL_01,
Page 0x00 corresponds to channel 0 and Page 0x01 cor-
responds to Channel 1. See PAGE description section. The
GUI will represent Channel 0 as U0:A0 and Channel 1 as
U0:A1. See Page 67.
ASEL_23 (AA10): Serial Bus Address Configuration Pin
for Channel 2 and 3 Controller. On any given I
serial bus segment, every device must have its own
unique slave address. If this pin is left open, the LTM4681
powers up to its default slave address of 0x4F (hexa-
decimal), i.e., 1001111b (industry-standard convention is
used throughout this document: 7-bit slave addressing).
The lower four bits of the LTM4681's slave address can
be altered from this default value by connecting a resistor
from this pin to SGND. Minimize capacitance—especially
when the pin is left open—to assure accurate detection
of the pin state. It is recommended to use a resistor
to set the address. The ASEL_23 address will be used
to address channels 2 and 3, and a different ASEL_01
address will be used to address channels 0 and 1. For
addressed ASEL_23, Page 0x00 corresponds to channel
2 and Page 0x01 corresponds to Channel 3. See PAGE
description section. The GUI will represent Channel 2 as
U1:B0 and Channel 3 as U1:B1. See Page 67.
FSWPH_01_CFG (A9): Switching Frequency, Channel
Phase-Interleaving Angle and Phase Relationship to SYNC
Configuration Pin for Channel 0 and 1. If this pin is left
open—or, if the LTM4681 is configured to ignore pin-
strap (R
1b—then LTM4681's switching frequency (FREQUENCY_
2
C/SMBus serial
SWITCH) and channel phase relationships (with respect
to the SYNC clock; MFR_PWM_CONFIG[2:0]) are dictated
at SV
contents for channel 0 and 1. Default factory values are:
350kHz operation; channel 0 at 0°; and channel 1 at 180°C
(convention throughout this document: a phase angle of
0° means the channel's switch node rises coincident with
the falling edge of the SYNC pulse). Connecting a resistor
divider from 2.5V to SGND (and using the factory-default
NVM setting of MFR_CONFIG_ALL[6] = 0b) allows a con-
venient way to configure multiple LTM4681s with identi-
cal NVM contents for different switching frequencies of
operation and phase interleaving angle settings of intra-
and extra-module-paralleled channels—all, without GUI
intervention or the need to custom pre-program module
NVM contents. (See the Applications Information sec-
tion.) Minimize capacitance—especially when the pin is
left open—to assure accurate detection of the pin state.
FSWPH_23_CFG (AA9): Switching Frequency, Channel
2
C/SMBus
Phase-Interleaving Angle and Phase Relationship to SYNC
Configuration Pin for Channel 2 and 3. If this pin is left
open—or, if the LTM4681 is configured to ignore pin-
strap (R
1b—then LTM4681's switching frequency (FREQUENCY_
SWITCH) and channel phase relationships (with respect
to the SYNC clock; MFR_PWM_CONFIG[2:0]) are dic-
tated at SV
NVM contents for channel 2 and 3. Default factory values
For more information www.analog.com
) resistors, i.e., MFR_CONFIG_ALL[6] =
CONFIG
power-up according to the LTM4681's NVM
IN_01
) resistors, i.e., MFR_CONFIG_ALL[6] =
CONFIG
power-up according to the LTM4681's
IN_23
LTM4681
Rev. A
19