Analog Devices Linear ADI Power LTM4681 Manual page 20

LTM4681
PIN FUNCTIONS
are: 350kHz operation; channel 2 at 0°; and channel 3 at
180°C (convention throughout this document: a phase
angle of 0° means the channel's switch node rises coinci-
dent with the falling edge of the SYNC pulse). Connecting a
resistor divider from 2.5V to SGND (and using the factory-
default NVM setting of MFR_CONFIG_ALL[6] = 0b) allows
a convenient way to configure multiple LTM4681s with
identical NVM contents for different switching frequencies
of operation and phase interleaving angle settings of intra-
and extra-module-paralleled channels—all, without GUI
intervention or the need to custom pre-program module
NVM contents. (See the Applications Information sec-
tion.) Minimize capacitance—especially when the pin is
left open—to assure accurate detection of the pin state.
VOUT0_CFG (A8): Output Voltage Select Pin for V
Coarse Setting. If the VOUT0_CFG and VTRIM0_CFG pins
are both left open—or, if the LTM4681 is configured to
ignore pin-strap (R
CONFIG
ALL[6] = 1b—then the LTM4681s target V
voltage setting (VOUT_COMMAND0) and associated
power-good and OV/UV warning and fault thresholds are
dictated at SV power-up according to the LTM4681's
IN_01
NVM contents. A resistor divider connected to 2.5V and
to SGND (see Table 1)—in combination with resistor pin
settings on VTRIM0_CFG, and using the factory-default
NVM setting of MFR_CONFIG_ALL[6] = 0b—can be used
to configure the LTM4681's channel 0 output to power-
up to a VOUT_COMMAND value (and associated output
voltage monitoring and protection/fault-detection thresh-
olds) different from those of NVM contents. (See the
Applications Information section.) Connecting resistor(s)
from VOUT0_CFG to SGND and/or VTRIM0_CFG to SGND
in this manner allows a convenient way to configure mul-
tiple LTM4681s with identical NVM contents for different
output voltage settings all without GUI intervention or
the need to custom-preprogram module NVM contents.
Minimize capacitance especially when the pin is left open
to assure accurate detection of the pin state. Note that use
of R s on VOUT0_CFG/VTRIM0_CFG can affect the
CONFIG
V range setting (MFR_PWM_MODE0[1]) and loop
OUT0
gain. For addressed ASEL_01, Page 0x00 corresponds to
channel 0 and Page 0x01 corresponds to Channel 1. See
PAGE description section.
20
) resistors, i.e., MFR_CONFIG_
output
OUT0
For more information
VTRIM0_CFG (D9): Output Voltage Select Pin for V
Fine Setting. Works in combination with VOUT0_CFG to
affect the VOUT_COMMAND (and associated output volt-
age monitoring and protection/fault-detection thresholds)
of channel 0, at SV
the Applications Information section.) A resistor divider
from 2.5V to SGND connected to the pin will set the
TRIM value. See Table 2. Minimize capacitance especially
when the pin is left open to assure accurate detection
of the pin state. Note that use of R
CFG/VTRIM0_CFG can affect the V
(MFR_PWM_MODE0[1]) and loop gain. For addressed
ASEL_01, Page 0x00 corresponds to channel 0 and Page
0x01 corresponds to Channel 1. See PAGE command
description section.
,
OUT0
VOUT1_CFG (B8): Output Voltage Select Pin for V
Coarse Setting. If the VOUT1_CFG and VTRIM1_CFG pins
are both left open—or, if the LTM4681 is configured to
ignore pin-strap (R
ALL[6] = 1b—then the LTM4681s target V
voltage setting (VOUT_COMMAND1) and associated
power-good and OV/UV warning and fault thresholds are
dictated at SV
IN_01
NVM contents. A resistor divider connected to 2.5V and
to SGND to this pin—in combination with resistor pin
settings on VTRIM1_CFG, and using the factory-default
NVM setting of MFR_CONFIG_ALL[6] = 0b—can be used
to configure the LTM4681's channel 1 output to power-
up to a VOUT_COMMAND value (and associated output
voltage monitoring and protection/fault-detection thresh-
olds) different from those of NVM contents. (See the
Applications Information section.) Connecting resistor(s)
from VOUT1_CFG to SGND and/or VTRIM1_CFG to SGND
in this manner allows a convenient way to configure mul-
tiple LTM4681s with identical NVM contents for different
output voltage settings all without GUI intervention or
the need to custom-preprogram module NVM contents.
Minimize capacitance especially when the pin is left open
to assure accurate detection of the pin state. Note that use
of R s on VOUT1_CFG/VTRIM1_CFG can affect the
CONFIG
V range setting (MFR_PWM_MODE1[1]) and loop
OUT1
gain. For addressed ASEL_01, Page 0x00 corresponds to
channel 0 and Page 0x01 corresponds to Channel 1. See
PAGE description section.
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power-up. (See VOUT0_CFG and
IN_01
s on VOUT0_
CONFIG
range setting
OUT0
) resistors, i.e., MFR_CONFIG_
CONFIG
power-up according to the LTM4681's
,
OUT0
,
OUT1
output
OUT1
Rev. A