How To Calculate The Sinc3_Dec_Rate; Value - Analog Devices EVAL-ADAQ7767-1 User Manual

User Guide
EXAMPLE DATA CAPTURE FOR THE DC SIGNAL

HOW TO CALCULATE THE SINC3_DEC_RATE

VALUE

By default, the EV-ADAQ7767-1FMC1Z provides the DUT with a
MCLK of approximately 16.384 MHz.
To achieve an ODR = 50 SPS using the sinc3 filter, use the
following equation:
MCLK
ODR =
MCLK_DIV × DEC_RATE
Determine the DEC_RATE, and assume the
an MCLK_DIV = 2:
MCLK
DEC_RATE =
MCLK_DIV × ODR
The SINC3_DEC_RATE_MSB and SINC3_DEC_RATE_LSB regis-
ters (Register 0x1A and Register 0x1B, respectively) increment the
value in the registers by one and then multiply them by 32 to give
the actual decimation rate. To set the decimation rate to 163,840,
use the following equation:
DEC_RATE
Value = − 1 = 5119
32
The values written to the sinc3 decimation registers are 5119 or
0x13FF.
Refer to the ADAQ7767-1 data sheet for more information on the
DUT register configuration.
analog.com
(2)
ADAQ7767-1 is using
= 163, 840
(3)
(4)
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