Power Supply Configurations; Analog Inputs; Reference Options - Analog Devices AD7172-4 User Manual

UG-763
Table 3. Power Supply Configurations
Configuration Input Voltage Range
Single Supply 7 V to 9 V
(Regulated)
Single Supply 7 V to 9 V, 5 V, and 3.3 V
(Unregulated)
Split Supply 7 V to 9 V
(Regulated)
Split Supply 7 V to 9 V, ±2.5 V, and
(Unregulated) 3.3 V
1
Only one configuration can be used at a time.

POWER SUPPLY CONFIGURATIONS

Single-Supply (Regulated)
There are two available power supply options for the single
supply (regulated) configuration.
•
Connect the ac to dc adapter (included) to J5 and set LK2
to Position B.
•
Connect the bench top power supply to J3, set LK2 to
Position A, and ensure that AVSS = AGND = 0 V.
Set all other links and solder links to the default settings as
outlined in Table 1.
Single Supply (Unregulated)
To set up the board, use the following procedure:
1. Move SL2 and SL5 to Position A.
2. Connect the two terminals of J9 (AGND and AVSS).
3. Connect the 0 V input (GND) to J9 at the AGND terminal.
4. Connect the 5 V input to J9 at the AVDD terminal.
5. Connect the 3.3 V input to J9 at the IOVDD terminal.
6. Connect the 7 V to 9 V input to J5.
Set all other links and solder links to the default settings as
outlined in Table 1.
Split Supply (Regulated)
To set up the board, use the following procedure:
1. Remove R49 to R51. These links connect AVSS to AGND.
2. Insert a 0 Ω resistor at R85.
3. Set LK1 to Position B, which sets the input to the power
monitor circuitry to work with the lower AVDD1 supply of
2.5 V.
4. Connect a bench top power supply to J5 and set LK2 to
Position B.
Set all other links and solder links to the default settings as
outlined in Table 1.
1
Description
The 7 V to 9 V input is regulated to 5 V for AVDD1/AVDD2 and 3.3 V for IOVDD. This also
powers the external 5 V reference. See the Single-Supply (Regulated) section.
The input is unregulated and connects directly to AVDD1/AVDD2 and IOVDD from J5. The
7 V to 9 V input powers the external 5 V reference. See the Single Supply (Unregulated) section.
The 7 V to 9 V input is regulated to 2.5 V for AVDD1/AVDD2, −2.5 V for AVSS and 3.3 V for
IOVDD. The 7 V to 9 V input powers the external 5 V reference, See the Split Supply
(Regulated) section.
The input is unregulated and connects directly to AVDD1/AVDD2 and IOVDD from J5. The
7 V to 9 V input powers the external 5 V reference. See the Split Supply (Unregulated) section.
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EVAL-AD7172-4SDZ User Guide
Split Supply (Unregulated)
To set up the board, use the following procedure:
1. Move SL2, SL3, and SL5 to Position A.
2. Remove R49 to R51.
3. Connect the 0 V input (GND) to J9 at the AGND terminal.
4. Connect the 2.5 V input to J9 at the AVDD terminal.
5. Connect the −2.5 V input to J9 at the AVSS terminal.
6. Connect the 3.3 V input to J9 at the IOVDD terminal.
7. Connect the 7 V to 9 V input to J5.
8. Set LK1 to Position B, which sets the input to the power
monitor circuitry to work with the lower AVDD1 supply of
2.5 V.
Set all other links and solder links to the default settings as
outlined in Table 1.

ANALOG INPUTS

The EVAL-AD7172-4SDZ primary analog inputs can be applied
in two separate ways.
•
At the J6 connector on the left side of the board
•
At the A0 to A4 SMB/SMA footprints on the evaluation
board
The analog inputs route directly to the associated analog input
pins on the AD7172-4 provided that the LK3 to LK16 links
(on-board noise test) are removed. The
software is set up to analyze dc inputs to the ADC. The
input buffers work for dc input signals.

REFERENCE OPTIONS

The EVAL-AD7172-4SDZ includes an external 5 V reference,
the ADR445. This reference connects to the REF+ input, and
the REF− input is connected to AVSS. The
second reference input, AIN0/REF2− and AIN1/REF2+. There
are also two SMB/SMA footprints for connecting an external
voltage reference source of the ADR445.
EVAL-AD7172-4SDZ
AD7172-4
AD7172-4 has a