Pcie Interface; Pcie Operating Mode - Quectel RM520N-GL Hardware Design

you should pay attention to the selection of the device. Typically, the stray capacitance should be
less than 1.0 pF for USB 2.0, and less than 0.15 pF for USB 3.1.
⚫
Keep the ESD protection devices as close to the USB connector as possible.
⚫ If possible, reserve 0 Ω resistors on USB_DP and USB_DM traces respectively.
Table 16: USB Trace Length Inside the Module
Signal
USB_DP
USB_DM
USB_SS_RX_P
USB_SS_RX_M
USB_SS_TX_P
USB_SS_TX_M

4.3. PCIe Interface

The module provides one integrated PCIe (Peripheral Component Interconnect Express) interface.
⚫
PCI Express Base Specification Revision 4.0 compliant
⚫
Data rate up to 16 Gbps

4.3.1. PCIe Operating Mode

The module supports endpoint (EP) mode and
default. In EP mode, the module is configured as a PCIe EP device. In RC mode, the module is
configured as a PCIe root complex.
AT+QCFG="pcie/mode" is used to set PCIe RC/EP mode.
AT+QCFG="pcie/mode" Set PCIe RC/EP Mode
Write Command
AT+QCFG="pcie/mode"[,<mode>]
RM520N-GL_Hardware_Design
Pin No. Length (mm)
7 19.4405
9 19.4201
37 11.9704
35 11.8261
31 8.3323
29 8.0534
root complex
Response
If the optional parameter is omitted, query the current setting:
+QCFG: "pcie/mode",<mode>
OK
Length Difference (mm)
0.0204
0.1443
0.2789
(RC) mode, and EP mode is configured by
5G Module Series
46 / 84