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Figure below illustrates the timing of the module's warm reset when only the reset signal is pulled low. In
this reset mode, the power of the module will not be turned off. The timing is recommended for module's
reset with a button.
VCC(H)
FULL_CARD_
POWER_OFF#(H)
RESET#
PCIE_CLKREQ_N
(L)
PCIE_RST_N(H)
PCIE_REFCLK
Module Status
NOTE:
When the module is in USB mode, please ignore the PCIe related signals and their timing parameters in the figure.
Table 12: Reset Timing of the Module's Warm Reset
Symbol
Min.
T
200 ms
RST#
If your design is for the complete hardware reset of the module, then refer to the sequence diagram as
below. The following timing is recommended for module's reset with NPN driver circuit. Sending the
command AT+CFUN=0 is necessary before reset the module.
RM520N-GL_Hardware_Design
Active
Figure 13: Reset Timing of the Module's Warm Reset
Typ.
Max.
400 ms
-
T
RST#
Baseband Resetting
Comment
Reset baseband chip IC only
5G Module Series
3.7 V
1.8 V
Booting
37 / 84
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