Quectel RM520N-GL Hardware Design page 37

Table 11: Definition of RESET# Pin
Pin No. Pin Name
67 RESET#
The module can be reset by pulling down the RESET# . An open collector/drain driver or a button can be
used to control RESET#.
Host
GPIO
Figure 11: Reference Circuit of RESET# with NPN Driver Circuit
RM520N-GL_Hardware_Design
I/O Description
Reset the module.
DI, PU
Active LOW
Reset pulse
R2
1k
S1 TVS
C1
33 pF
NOTE: The capacitor C1 is recommended to be less than 47 pF.
Figure 12: Reference Circuit of RESET# with a Button
DC Characteristics
1.8 V
RESET#
Q1
NPN
R3
T
RST#
100k
Module
VDD 1.8 V
RESET#
67
T
RST#
5G Module Series
Comment
Internally pulled up to
1.8 V.
Module
VDD 1.8 V
1.5 μ A
67
1.5 μ A
BB
BB
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