Supermicro SuperStorage Server SSG-6049P-E1CR60H User Manual page 95

IIO Configuration

IIO Configuration
EV DFX Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces-
sor will always remain clear during electric tuning. The options are Disable and Enable.
 CPU1 Configuration
IOU0 (IIO PCIe Br1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
 P1_NVMe0
Link Speed
Use this feature to select the link speed for the PCIe port. The options are Auto,
Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Clocking
The options are Distinct and Common. If this item is set to Distinct, this component
and the component at the opposite end of the Link are operating with separate refer-
ence clock sources. If this item is set to Common, this component and the component
at the opposite end of the Link are operating with a common clock source.
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Chapter 6: UEFI BIOS