Variable Memory - Sram - Renesas RL78 Series Application Note
Vde certified self test library
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Also See for RL78 Series:
- User manual (1879 pages) ,
- Manual (88 pages) ,
- Application note (25 pages)
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RL78 Family
2.3
Variable memory - SRAM
March Tests are a family of tests that are well recognised as an effective way of testing RAM.
A March test consists of a finite sequence of March elements, where a March element is a finite sequence of operations
applied to every cell in the memory array before proceeding to the next cell.
In general the more March elements the algorithm consists of, the better will be its fault coverage but at the expense of a
slower execution time.
The algorithms themselves are destructive (they do not preserve the current RAM values). It is the user's responsibility
to preserve the Ram contents during testing after the application system has been initialised or while in operation The
system March C and March X test modules are design such that small parts of the Ram area can be tested, thus
minimising the need to provide a large temporary area to save the data under test. Additional version of the test module
("stl_RL78_march_c_initial" and "stl_RL78_march_x_initial"), are included that are designed to run before the system
has been initialised, so that the complete memory area can be tested before starting the main application.
The area of RAM being tested can not be used during testing, making the testing of RAM used for the stack particularly
difficult. Practically this area can only be tested before the application C-Stack is initialised or after the application
operation is complete.
The following section introduces the specific March Tests.
2.3.1
Algorithms
(1)
March C
The March C algorithm (van de Goor 1991) consists of 6 March elements with a total of 10 operations. It detects the
following faults:
1. Stuck At Faults (SAF)
• The logic value of a cell or a line is always 0 or 1.
2. Transition Faults (TF)
• A cell or a line that fails to undergo a 0→1 or a 1→0 transition.
3. Coupling Faults (CF)
• A write operation to one cell changes the content of a second cell.
4.
Address Decoder Faults (AF)
• Any fault that affects address decoding:
• With a certain address, no cells can be accessed.
• A certain cell is never accessed.
• With a certain address, multiple cells are accessed simultaneously.
• A certain cell can be accessed by multiple addresses.
The usual March C algorithm employs 6 March elements:-
1. Write all zeros to array (
2. Starting at lowest address, read zeros, write ones, increment up array bit by bit. (
3. Starting at lowest address, read ones, write zeros increment up array bit by bit. (
4. Starting at highest address, read zeros, write ones, decrement down array bit by bit. (
5. Starting at highest address, read ones, write zeros, decrement down array bit by bit. (
6. Read all zeros from array. (
R01AN0749EG0201 Rev.2.01
Mar 04, 2014
VDE Certified IEC60730/60335 Self Test Library
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