Part 1: Ac7021 Core Board; Introduction - Alinx AC7021 User Manual

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Part 1: AC7021 Core Board

1.1 Introduction

The AC7021 (core board model, the same below) core board is an FPGA
development board based on the Zynq chip XC7Z020-2CLG484I of the XILINX
ZYNQ7000 series. The ZYNQ chip's PS system integrates two ARM CortexTM-
A9 processors, AMBA® interconnects, internal memory, external memory
interfaces and peripherals. The ZYNQ FPGA chip contains a wide range of
programmable logic cells, DSP and internal RAM.
The core board uses two SK Hynix DDR3 chips (H5TQ4G63AFR-PBI),
each with a 4Gbit DDR capacity; two DDR chips form a 32-bit data bus width,
and the read and write data clock frequency between ZYNQ FPGA and DDR3
is up to 533Mhz; such a configuration can meet the system's high bandwidth
data processing needs
In order to connect to the carrier board, the four board-to-board connectors
of the core board extend the USB interface of the PS side, the Gigabit Ethernet
interface, the SD card interface and other remaining MIO ports. As well as
almost all IO ports (198) of BANK13, BANK33, BAN34 and BANK35 on the PL
side, the level of IO of BANK33 and BANK34 can be modified by replacing the
LDO chip on the core board to meet the requirements of users with different
level interfaces. For users who need a lot of IOs, this core board will be a good
choice. Moreover, the IOs connection part, the routing between the ZYNQ
FPGA chip and the interface is equal length and differential processing. The
core board size is only 2.36 inch* 2.36 inch, which is very suitable for
secondary development.
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ZYNQ FPGA Development Board AX7021 User Manual
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