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PA-2013 Motherboard Manual
Chipset Features Setup
Video BIOS Cacheable
When enabled, allows the system to use the video BIOS codes from SRAMs,
instead of the slower DRAMs or ROMs.
The options are: Enabled (Default), Disabled.
System BIOS Cacheable
When enabled, allows the ROM area F000H-FFFFH to be cacheable when
cache controller is activated. The options are: Disabled (Default), Enabled.
Memory Hole At 15M Addr.
When you install a Legacy ISA card, this feature allows you to select the
memory hole' s address range of the ISA cycle when the processor accesses
the selected address area. Please read your card manual for detail
information. When disabled, the memory hole at the 14MB (or 15MB)
address will be treated as a DRAM cycle when the processor accesses the
14~16MB (or 15~16MB) address area.
The options are: 15M-16M, 14M-16M, Disabled (Default).
DRAM Page-Mode
It saves the time to resend CAS if DRAM access in the same page (RAS);
therefore, increases the system performance.
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