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Processor PCIEX4_B_* lanes can either be connected to COMh PCIe lanes [12:15] or to the
optional onboard NVME Flash.

3.4.2 USB

The COM-HPC Client Module supports up to eight USB 2.0 ports and up to four USB 3.2 Gen 2×2 or
USB4 ports. A COM-HPC USB 3.2 Gen 2×2 port may alternatively be used as a USB 3.2 Gen 1 or Gen 2
port as well.
The COM-HPC Server Module supports up to eight USB 2.0 ports, up to two USB 3.2 Gen 1 or Gen 2
ports and up to two USB 3.2 Gen 2×2 ports or USB4 ports. A USB 3.2 Gen 2×2 may be used as a USB
3.2 Gen 1 or Gen 2 port as well.
To realize a COM-HPC USB 3.2 Gen 1, Gen 2, Gen 2×2 or USB4 port, one of the four available USB 2.0
ports from the USB[0:3] pool must be used along with the SuperSpeed pins.
COMh-caRP support up to 8x USB 2.0, 2 USB 4.0 and 2x USB 3.2 Gen 2
To support USB4 on USB0 SS or USB1 SS USB2 ports can not be swapped. USB0 SS has to use USB2
port 0 and USB1 SS has to use USB2 port1. Configuration has to be done in BIOS during build time.
For USB 4.0 following signals are used
COMh connector ADL P
USB0_SSTX[0:1]± TCP2_TX[0:1]±
USB0_SSRX[0:1]± TCP2_TXRX[0:1]±
USB1_SSTX[0:1]± TCP3_TX[0:1]±
USB1_SSRX[0:1]± TCP3_TXRX[0:1]±
USB0_LS[TX:RX]
TBT_LSX2_[RX:TX]D
USB1_LS[TX:RX]
TBT_LSX3_[RX:TX]D
USB0_AUX±
TCP2_AUX_[P:N]
USB1_AUX±
TCP3_AUX_[P:N]
SML[0:1]_DAT
SML0[CLK:DATA]
SML[0:1]_CLK
SML1[CLK:DATA]
PMCALERT#
GPP_B11/PMCALERT# Active low Alert signal associated with SML1
USB_RT_ENA
GPP_D3
USB_PD_I2C_DAT -
USB_PD_I2C_CLK -
USB_PD_ALERT# -
Table 14: USB 4.0 signals
For USB 3.2 ports following signals are used:
COMh connector HSIO
USB_SS2
USB32_1 3.2 Gen2 x1 (5/10 Gb/s)
USB_SS3
USB32_2 3.2 Gen2 x1 (5/10 Gb/s)
Table 15: USB 3.2 signals
COM-HPC connector ADL P
USB0
USB2 1 In corresponding with USB_SS0
USB1
USB2 2 In corresponding with USB_SS1
www.kontron.com
Description
4 Gen 2×2/3×2 (20/40 Gb/s)
4 Gen 2×2/3×2 (20/40 Gb/s)
4 Gen 2×2/3×2 (20/40 Gb/s)
4 Gen 2×2/3×2 (20/40 Gb/s)
sideband TX/RX interface
sideband TX/RX interface
DisplayPort Aux channel for USB4 DP modes
DisplayPort Aux channel for USB4 DP modes
SM Link to support Carrier USB4 Re-Timers
SM Link to support Carrier USB PD Controller
Power Enable for carrier based USB Re-Timers
I2C data line between EC and carrier
I2C clock line between EC and carrier
Active low Alert signal from USB PD controller
Port Description
Description
COMh-caRP User Guide
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