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EVAL-ADG5209FEBZ User Guide
JUMPER SETTINGS
SWITCHES AND 0 Ω RESISTORS
Switches are used to control the
0 Ω resistors are used to configure the digital control voltage.
Table 2 shows a summary of the switches and 0 Ω resistors and
how they are used on the evaluation board.
Use SW2 and SW3 to control the switches of the ADG5209F.
Position L is tied to GND and sets the logic low, and Position H
is tied to VL and sets the logic high.
Use SW1 to enable or disable the device. Position DIS is tied to
GND and disables the device, and Position EN is tied to VL and
enables the device.
Table 2. Switch and 0 Ω Resistor Descriptions
Label
Position
SW1
EN
DIS
SW2
L
H
SW3
L
H
R13/R14
R14
R13
R15
Inserted
Removed
R31, R33, R35
Inserted
Removed
ADG5209F
manually and
Description
Logic 0 on the EN pin
Logic 1 on the EN pin
Logic 0 on the A0 pin
Logic 1 on the A0 pin
Logic 0 on the A1 pin
Logic 1 on the A1 pin
On-board LDO regulator digital voltage
EXT_VL digital voltage
LDO regulator powered up
LDO regulator unpowered
SW1 to SW3 are used to control digital logic
SMB connectors are used to control digital logic
Table 1.
ADG5209F
SW1 (EN)
DIS
EN
EN
EN
EN
1
X means don't care.
R15 connects the on-board LDO regulator to the VDD supply.
Remove this resistor to protect the LDO regulator from voltages
higher than 28 V. Change the 0 Ω resistor to Position R13 to use
an alternative digital voltage connected to DC_V1.
SMB CONNECTORS
The parallel interface of the
using the link headers of SW1 to SW4, or it can be accessed using
the SMB connectors, EN, A0, A1, and A2. To use the SMB
connectors, remove the 0 Ω R31, R33, and R35 resistors.
Rev. 0 | Page 5 of 12
Truth Table
SW2 (A0)
SW3 (A1)
1
1
X
X
L
L
L
H
H
L
H
H
ADG5209F
is controlled manually
UG-875
Connected Sx
All switches off
S1A/S1B
S2A/S2B
S3A/S3B
S4A/S4B
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